SiC Epitaxial Wafer Bevel Geometry for Low Edge Dislocation Density
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Solution Overview
Problem
The generation of outer edge interface dislocations in SiC epitaxial wafers, which deteriorate device reliability, is not effectively addressed by existing technologies due to the difficulty in observing and reducing these dislocations, especially in thicker epitaxial films where they are rarely encountered.
Innovation Solution
A SiC epitaxial wafer with a 4H-SiC single crystal substrate having a bevel part with a slope width of 150 μm or more, where the epitaxial film thickness is 20 μm or more, and the density of interface dislocations extending from the outer peripheral edge is 10 lines/cm or less, is manufactured using a method that determines the epitaxial film thickness based on the slope width to minimize dislocation density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the epitaxial film thickness is increased to 20 μm or more, then the device performance and reliability are improved, but the density of outer edge interface dislocations increases and becomes difficult to control
Solution Approach 1:
The patent applies preliminary action by forming a buffer layer with a specific crystal orientation (different from both the substrate and the final epitaxial film) before growing the thick epitaxial film. This buffer layer is prepared in advance to prevent dislocation propagation, allowing the subsequent thick film growth without generating excessive interface dislocations. The buffer layer acts as a preliminary protective structure that enables both thick film formation and low dislocation density.
Solution Approach 2:
The buffer layer serves as an intermediary between the SiC substrate and the thick epitaxial film. It has a crystal orientation that is different from both the substrate and the final film, acting as a mediator that blocks dislocation propagation while allowing the thick film to grow. This intermediary layer enables the system to achieve both thick film thickness (20 μm or more) and low interface dislocation density (10 lines/cm or less).
2Ease of manufacture
If conventional growth methods are used, then the manufacturing process is simple, but outer edge interface dislocations are generated and difficult to observe and reduce
Solution Approach 1:
The patent replaces conventional mechanical/chemical growth methods with a controlled epitaxial growth process that forms a buffer layer with specific crystal orientation. This substitution enables better control over dislocation propagation while maintaining manufacturing feasibility. The method uses standardized epitaxial growth techniques but applies them in a novel sequence (substrate → buffer layer with different orientation → final epitaxial film) to achieve both ease of manufacture and reduced dislocation density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a SiC epitaxial wafer with a low density of outer edge interface dislocations, enhancing the reliability and quality of the epitaxial film, particularly for thicker films where such dislocations were previously unmanageable.
Implementation Method 1
a SiC epitaxial layer (film) that becomes an active region of the device by chemical vapor deposition (CVD) or the like is grown on a SiC single crystal substrate
Implementation Method 2
by step flow growth (lateral direction growth from an atomic step)
Data Source
AI summary
According to the present invention, there is provided a SiC epitaxial wafer including: a 4H-SiC single crystal substrate which has a surface with an off angle with respect to a c-plane as a main surface and a bevel part on a peripheral part; and a SiC epitaxial layer having a film thickness of 20 μm or more, which is formed on the 4H-SiC single crystal substrate, in which a density of an interface dislocation extending from an outer peripheral edge of the SiC epitaxial layer is 10 lines/cm or less.