Semiconductor Channel Structure With Side Doping for Bit Line Conductivity

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Solution Overview

Problem

Current semiconductor structures face weak electrical conductivity between bit line and active structures, which affects the integration level and working speed of semiconductor devices, particularly in buried word line and GAA structures.

Innovation Solution

A semiconductor structure is designed with a bit line and semiconductor channel where the semiconductor doping layer is on the side of the bit line, and a word line surrounds the channel, increasing contact area and forming a GAA structure to enhance conductivity and stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a buried word line structure or GAA structure is used to improve integration level and working speed, then the integration level and working speed are improved, but the electrical conductivity between the bit line structure and the active structure becomes weak

Engineering Contradiction:
Improveworking speedVSAvoidelectrical conductivity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a side surface doping layer that contacts the bit line from the lateral dimension rather than only from the top surface. This dimensional change in doping approach creates additional conduction pathways, thereby improving electrical conductivity between the bit line and active structure while maintaining the integrated GAA architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The doping structure is segmented into multiple regions: a top surface doping region and a side surface doping region. This segmentation allows independent optimization of each doping region's characteristics, enabling improved electrical conductivity through the side surface region while maintaining proper device operation through the top surface region.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the word line is positioned to surround the semiconductor channel (GAA structure), then gate control performance is improved, but the contact area between bit line and active structure is reduced

Engineering Contradiction:
Improvegate control performanceVSAvoidcontact area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extends the doping region to the side surface of the bit line, utilizing the lateral dimension to create additional contact area. This compensates for the reduced top surface contact area caused by the word line surrounding the channel, thereby maintaining adequate electrical conductivity while preserving the GAA gate control structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The doping concentration and distribution are locally optimized at the side surface of the bit line where contact with the active structure is needed. This localized quality enhancement ensures adequate conductivity in the critical contact region without interfering with the overall GAA structure and gate control performance.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves the electrical conductivity and stability of the semiconductor structure, reducing leakage current, capacitance effects, and short channel effects, while enhancing gate control performance and integration level.

Implementation Method 1

the top surface of the semiconductor doping layer is in contact with the semiconductor channel

Methodology Applied
Scientific EffectPhysical contact:

Data Source

PatentUS12193220B2Semiconductor structure and method forming the same
Publication Date: 2025.01.07 CHANGXIN MEMORY TECH INC
  • US12193220B2 patent drawing
  • US12193220B2 patent drawing
  • US12193220B2 patent drawing

AI summary

A semiconductor structure and a manufacturing method are provided. The semiconductor structure includes: a substrate having a bit line extending along a first direction; a semiconductor channel located on the bit line; a semiconductor doping layer located on the side of the bit line, wherein the top surface of the semiconductor doping layer is connected to the semiconductor channel contact; a word line extending in the second direction, encircling part of the semiconductor channel, and the bottom surface of the word line is higher than the top surface of the bit line; a word line dielectric layer located between the word line and the semiconductor channel; an isolation layer located between the word line and the bit line and between the word line and the semiconductor doping layer. The device and method improve the prior weak electrical conductivity between the bit line structure and the active structure.