Semiconductor Device Sidewall Composition Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The thinning of gate insulating films in MISFETs to enhance gate capacitance leads to increased leak current due to tunneling, and using high-dielectric constant materials introduces fixed charge, shifting threshold voltage, which is challenging to control effectively.
Innovation Solution
The semiconductor device incorporates a first and second transistor with gate insulating films made of high-dielectric constant materials, where the formation conditions of sidewalls, such as film forming method, Si raw material, and temperature, are varied to differ between the two, resulting in distinct threshold voltages by controlling the abundance ratio of Si—H bonds to N—H bonds, Cl, and H impurities, allowing for adjustable threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the gate insulating film is thinned to enhance gate capacitance, then the gate capacitance is improved, but the leak current due to tunneling increases
Solution Approach 1:
The patent changes the dielectric constant parameter of the gate insulating film material from conventional low-k materials to high-k materials (such as HfO2, SrTiO3, BaTiO3), enabling sufficient gate capacitance without thinning the film thickness, thereby suppressing tunneling leak current while maintaining high gate control
2Object-generated harmful factors
If a high-dielectric constant material is used for the gate insulating film to suppress tunneling, then the leak current is reduced, but fixed charge is generated which shifts threshold voltage
Solution Approach 1:
The patent introduces offset spacers with different materials or structures on different sides of the gate electrode to create local asymmetry, compensating for the threshold voltage shift caused by fixed charge in the high-k gate insulating film and enabling independent control of threshold voltage
Solution Approach 2:
The patent employs asymmetric offset spacer structures where the first offset spacer and second offset spacer differ in material composition, thickness, or positioning, allowing differential compensation of fixed charge effects to precisely control threshold voltage in the presence of high-k dielectric materials
3Manufacturing precision
If offset spacers are formed to control threshold voltage, then the threshold voltage control is improved, but the device structure becomes more complex
Solution Approach 1:
The patent combines the offset spacer formation process with existing gate electrode fabrication steps, integrating threshold voltage control functionality into the standard CMOS manufacturing flow without requiring separate dedicated process modules, thereby minimizing added complexity
Data Source
AI summary
A semiconductor substrate according to one embodiment includes: a first transistor having a first gate insulating film formed on a semiconductor substrate, a first gate electrode formed on the first gate insulating film and a first sidewall formed on a side face of the first gate electrode, the first gate insulating film comprising a high-dielectric constant material as a base material, a part of the first sidewall contacting with the first gate insulating film and containing Si and N; and a second transistor having a second gate insulating film formed on the semiconductor substrate, a second gate electrode formed on the second gate insulating film and a second sidewall formed on a side face of the second gate electrode so as to contact with the second gate insulating film, the second gate insulating film comprising a high-dielectric constant material as a base material, a part of the second sidewall contacting with the second gate insulating film and containing Si and N, wherein at least one of an abundance ratio of Si—H bond to N—H bond per unit volume, an amount of Cl per unit volume and an amount of H per unit volume of the second sidewall is larger than that of the first sidewall; and a threshold voltage of the second transistor is higher than that of the first transistor.


