Semiconductor Interconnect Sidewall Image Transfer via Formation
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Solution Overview
Problem
Conventional dual damascene processes for forming interconnect structures in semiconductor devices face challenges with increasing aspect ratios and pattern collapse due to the need for thicker hard masks, which lead to erosion and inaccurate via formation.
Innovation Solution
The method employs sidewall image transfer to define a trench pattern, using residual sidewalls as sacrificial masks during via formation, allowing for significantly thinner metal hard mask layers and improved alignment and accuracy in via creation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If thicker hard mask layers are used to maintain pattern definition with increasing aspect ratios, then manufacturing precision deteriorates due to mask erosion during etching, but device miniaturization requirements demand better precision
Solution Approach 1:
The patent divides the masking function into two separate components: sidewall spacers formed from mandrels provide the primary pattern definition and protection, while a thin metal hard mask layer provides secondary protection during trench etching. This segmentation allows each layer to be optimized independently, eliminating the need for thick metal masks that cause erosion during via etching.
Solution Approach 2:
The sidewall spacers act as an intermediary protective layer between the metal hard mask and the etching process. These spacers, formed from insulating material, provide the necessary protection during via hole etching without requiring a thick metal mask, thereby preventing mask erosion while maintaining via formation accuracy.
2Reliability
If thicker hard mask layers are used to prevent erosion during etching, then the aspect ratio of overlying layers increases, leading to pattern collapse
Solution Approach 1:
The protective function is segmented between sidewall spacers and a thin metal hard mask layer. The sidewall spacers, being insulating material, provide sufficient protection during via etching without adding significant height, thus maintaining acceptable aspect ratios and preventing pattern collapse.
Solution Approach 2:
The mandrels used to form sidewall spacers serve as temporary, disposable structures that are removed after serving their protective function. This allows the use of thin metal mask layers without compromising pattern stability, as the sidewall spacers provide the necessary protection during critical etching steps.
3Ease of manufacture
If the same hard mask is used for both trench pattern definition and via alignment, then process complexity increases due to repeated exposure to etching steps
Solution Approach 1:
The patent segments the pattern definition and protection functions into separate structures: sidewall spacers for trench definition and a thin metal hard mask for via alignment. This segmentation allows each component to be optimized for its specific function, with the sidewall spacers protecting against trench etching and the thin metal mask providing via alignment without suffering from repeated erosion.
Solution Approach 2:
The sidewall spacers automatically provide protection during via hole etching due to their positioning and material properties, eliminating the need for the metal hard mask to serve dual functions. This self-service mechanism simplifies the overall process by reducing the number of exposure and etching steps required.
Data Source
AI summary
An improved method of making interconnect structures with self-aligned vias in semiconductor devices utilizes sidewall image transfer to define the trench pattern. The sidewall height acts as a sacrificial mask during etching of the via and subsequent etching of the trench, so that the underlying metal hard mask is protected. Thinner hard masks and/or a wider range of etch chemistries may thereby be utilized.