Sidewall Insulating Layer for Selective Etching in 3D Memory
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Solution Overview
Problem
In the manufacturing of three-dimensional nonvolatile memory devices, existing methods face challenges in selectively removing the memory layer from the bottom surface of memory holes without etching the memory layer on the sidewalls, which can lead to misalignment and inefficient processing.
Innovation Solution
The implementation of a sidewall insulating layer on the inner wall surface of the joint, which is continuous with the memory hole, prevents etching of the memory layer on the sidewall by acting as a self-alignment mask, ensuring that only the bottom memory layer is removed during the etching process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a process of removing the memory layer by etching is performed, then the bottom memory layer can be removed, but the memory layer on the sidewall of the memory hole may also be etched
Solution Approach 1:
A sidewall insulating layer is introduced as an intermediary protective structure between the etching process and the memory layer on the sidewall. This insulating layer acts as a mask that prevents the etchant from reaching and damaging the memory layer, while allowing complete removal of the bottom memory layer through the memory hole opening.
Solution Approach 2:
The sidewall insulating layer is formed in advance before the etching process. By preparing this protective layer beforehand on the sidewalls of the memory hole, the patent ensures that when the etching process occurs, the memory layer on the sidewall is already protected, enabling selective removal of only the bottom memory layer.
2Productivity
If the memory layer on the sidewall is etched, then the etching process can proceed, but misalignment and inefficient processing occur
Solution Approach 1:
The sidewall insulating layer serves as a protective intermediary that allows the etching process to proceed efficiently without causing misalignment. By preventing unwanted etching of the sidewall memory layer, it ensures that the intended bottom memory layer removal is achieved with high precision, avoiding rework and improving overall productivity.
3Device complexity
If only the bottom memory layer is removed without sidewall protection, then the process is simpler, but the integrity of memory cells cannot be maintained
Solution Approach 1:
The sidewall insulating layer is a relatively simple structure that can be integrated into the existing manufacturing process. While it adds one more layer, it significantly enhances memory cell integrity by preventing damage during the etching process, thereby improving reliability with minimal increase in device complexity.
Solution Approach 2:
By forming the sidewall insulating layer in advance, the patent provides a simple yet effective solution that protects memory cell integrity before the etching process occurs. This preliminary protective measure ensures reliable memory cell structure is maintained throughout the manufacturing process.
Data Source
AI summary
A semiconductor memory device according to embodiments described herein, includes a first stacked body, a second stacked body, a first memory hole, a second memory hole, and a joint. In the first stacked body, a plurality of first conductive layers and a plurality of first insulating layers are alternately stacked. The second stacked body is disposed above the first stacked body, and a plurality of second conductive layers and a plurality of second insulating layers are alternately stacked therein. The first memory hole extends in the first stacked body in a first direction that is a stacking direction of the first stacked body. The second memory hole extends in the second stacked body in the first direction. The joint communicates the first memory hole and the second memory hole. The joint includes an inner wall surface and a sidewall insulating layer. The inner wall surface has a plane continuous with the inner wall of the first memory hole. The sidewall insulating layer is disposed on the inner wall surface of the joint.