Sidewall Mask Layer for Via Etch Hardmask Protection
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Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in controlling via and trench profiles, selectivity between patterning layers, and ULK damage during the Trench First Metal Hard Mask (TFMHM) scheme, leading to hardmask loss and potential metal line shorts due to inadequate hardmask protection and process selectivity.
Innovation Solution
A sidewall mask layer is deposited conformally over the hard mask in a merged via region, acting as a sacrificial layer to protect the hard mask during the via etch, reducing via critical dimension and hardmask loss while maintaining metal filling capability and defect performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the hard mask is exposed to the via etch and subsequent trench etch processes, then the via and trench can be formed, but the hard mask breaks due to insufficient margin
Solution Approach 1:
A planarization layer is deposited over the hard mask before the via etch process. This preliminary action provides protective coverage that prevents the hard mask from breaking during subsequent etching operations, allowing the via etch to proceed without compromising hard mask integrity.
Solution Approach 2:
The planarization layer acts as an intermediary protective layer between the etch process and the hard mask. It absorbs the mechanical stress and chemical exposure during via and trench etching, thereby protecting the hard mask from breaking while still allowing the etch to reach the underlying layers through the intended openings.
2Reliability
If the hard mask is made more robust to protect underlying material, then protection is improved, but the aspect ratio increases causing metal filling defects
Solution Approach 1:
The protective function is segmented between two separate layers: the hard mask layer and the planarization layer. This segmentation allows the hard mask to maintain its original thickness (avoiding aspect ratio issues) while the planarization layer provides the additional robust protection needed during etching processes.
Solution Approach 2:
The structure uses a composite approach with two different materials serving complementary functions: the hard mask material provides the necessary etch resistance and pattern definition, while the planarization layer material provides mechanical support and protection. Together they achieve both protection and acceptable aspect ratio.
3Reliability
If the via etch time is reduced to minimize hard mask loss, then hard mask protection is improved, but the via open issue occurs due to under etching
Solution Approach 1:
The planarization layer is deposited in advance to provide protective coverage during the via etch. This preliminary protection allows the via etch to be performed for the full duration needed to achieve proper via opening, without excessive hard mask loss, since the planarization layer absorbs the additional exposure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The sidewall mask layer improves hardmask margin during the via etch, reducing the risk of metal line shorts and maintaining defect-free performance without compromising metal filling, thus addressing the limitations of existing TFMHM schemes.
Implementation Method 1
a sidewall mask layer is deposited on a hard mask layer
Implementation Method 2
The sidewall mask layer is conformally deposited on the hard mask
Implementation Method 3
all patterns and materials are exposed to plasma at the same time
Implementation Method 4
dielectric reactive ion etching (RIE) process
Data Source
AI summary
Embodiments described herein provide approaches for interconnect formation in a semiconductor device using a sidewall mask layer. Specifically, a sidewall mask layer is deposited on a hard mask in a merged via region of the semiconductor device following removal of a planarization layer previously formed on the hard mask. The sidewall mask layer is conformally deposited on the hard mask, and acts like a sacrificial layer to protect the hard mask during a subsequent via etch. This reduces the via critical dimension (CD) and reduces the CD elongation along the hard mask line direction during the via etch.