Sidewall Spacer Patterning for Semiconductor Resolution
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Solution Overview
Problem
The double patterning method for semiconductor devices faces limitations in achieving fine width patterning and resolving misalignment issues, particularly in forming narrow and wide patterns simultaneously with high precision.
Innovation Solution
A method involving the sequential formation of target and mask layers, with sidewall spacers used as etching masks to define multiple patterns, allowing for the conversion of initial patterns into finer structures, and the use of protective mask layers to prevent misalignment during etching processes, enabling the formation of micro-patterns with improved resolution and density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional double patterning method is used, then pattern density can be increased, but manufacturing precision deteriorates due to misalignment issues
Solution Approach 1:
The patent introduces sidewall spacers as intermediary structures that are formed on the first pattern and then used as etching masks to define the second pattern. This intermediary approach eliminates direct alignment between first and second patterns, as the sidewall spacers self-align to the first pattern geometry, thereby resolving the misalignment issue while achieving doubled pattern density
Solution Approach 2:
The patent segments the patterning process into distinct stages: first forming the first pattern in the first mask layer, then forming sidewall spacers on the first pattern, and finally using the sidewall spacers to define the second pattern in the second mask layer. This segmentation allows each pattern to be defined independently through separate etching processes, eliminating cumulative alignment errors
2Measurement precision
If double patterning method is applied, then resolution limit can be overcome, but device complexity increases due to multiple process steps
Solution Approach 1:
The sidewall spacers serve multiple functions: they act as structural elements defining the second pattern geometry, serve as etching masks for transferring the pattern to the second mask layer, and provide self-alignment references. This multi-functionality reduces the need for additional dedicated alignment marks or complex positioning systems, thereby managing process complexity while achieving high resolution
Solution Approach 2:
The sidewall spacers are formed directly from the first pattern geometry through conformal deposition, automatically inheriting the precise positioning and spacing information from the first pattern. This self-service mechanism eliminates the need for external alignment systems or complex photolithography steps, simplifying the overall process while maintaining high resolution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the precision and density of micro-patterns in semiconductor devices, reducing misalignment and allowing for the simultaneous formation of narrow and wide patterns, thereby overcoming the limitations of conventional double patterning methods.
Implementation Method 1
depositing a silicon oxide layer on the first pattern using an atomic layer deposition (ALD) or chemical vapor deposition (CVD) technique
Implementation Method 2
depositing a silicon oxide layer on the first pattern using an atomic layer deposition (ALD) or chemical vapor deposition (CVD) technique
Data Source
AI summary
Methods of forming integrated circuit devices utilize fine width patterning techniques to define conductive or insulating patterns having relatively narrow and relative wide lateral dimensions. A target material layer is formed on a substrate and first and second mask layers of different material are formed in sequence on the target material layer. The second mask layer is selectively etched to define a first pattern therein. Sidewall spacers are formed on opposing sidewalls of the first pattern. The first pattern and sidewall spacers are used collectively as an etching mask during a step to selectively etch the first mask layer to define a second pattern therein. The first pattern is removed to define an opening between the sidewall spacers. The first mask layer is selectively re-etched to convert the second pattern into at least a third pattern, using the sidewall spacers as an etching mask. The target material layer is selectively etched using the third pattern as an etching mask.