Selective SiGe Etching for RF Epitaxial Silicon Leakage Control

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Solution Overview

Problem

Conventional silicon substrates used in RF device fabrication suffer from harmonic distortion and low resistivity, leading to heat dissipation issues and current leakage, particularly with the use of SiGe layers, which can impair device performance.

Innovation Solution

A selective etching process using a reactive chemistry combination of sulfur hexafluoride (SF6), nitrogen (N2), and boron chloride (BCl3) is employed to remove SiGe interfacial layers while forming an etch passivation film on doped epitaxial silicon, optimizing etching and passivation rates to enhance thermal and electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SiGe interfacial layer is used between silicon substrate and epitaxial silicon, then misfit dislocation is reduced, but current leakage occurs due to narrow gap nature of SiGe material

Engineering Contradiction:
Improvemisfit dislocation reductionVSAvoidcurrent leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent removes the SiGe interfacial layer completely from the structure after it has served its purpose of reducing misfit dislocations during fabrication. This extraction eliminates the harmful current leakage effect while preserving the beneficial dislocation reduction that occurred during the manufacturing process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The SiGe layer is temporarily introduced during the fabrication process to reduce misfit dislocations, then systematically removed in a controlled manner. This preliminary action allows the structure to benefit from dislocation reduction without retaining the harmful conducting properties of SiGe in the final device.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conventional silicon substrate is used for RF device fabrication, then cost is reduced and manufacturing capacity is increased, but harmonic distortion and low resistivity occur

Engineering Contradiction:
Improvemanufacturing cost and capacityVSAvoidharmonic distortion and low resistivity
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a silicon-on-insulator (SOI) structure as an intermediary layer between the conventional silicon substrate and the epitaxial silicon layer. This mediator provides high resistivity and reduces harmonic distortion while allowing the use of low-cost conventional silicon substrates for manufacturing.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If SiGe layer is used instead of buried oxide layer, then RFSOI wafer shortage is addressed, but harmonic distortion occurs due to silicon substrate

Engineering Contradiction:
Improvewafer availabilityVSAvoidharmonic distortion
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent removes the SiGe layer that was previously used as a substitute for buried oxide, and instead implements a proper SOI structure with oxide layer. This extraction eliminates the harmonic distortion problem while maintaining wafer availability through alternative manufacturing approaches.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This process effectively reduces harmonic distortion and current leakage, improving the thermal and electrical performance of RF devices by selectively removing SiGe layers and forming a protective passivation film, thereby enhancing device reliability and efficiency.

Implementation Method 1

A selective etching process using a reactive chemistry combination of sulfur hexafluoride (SF6), nitrogen (N2), and boron chloride (BCl3) is employed to remove SiGe interfacial layers while forming an etch passivation film on doped epitaxial silicon

Methodology Applied
Scientific EffectSelective etching:

Implementation Method 2

The reactive chemistry combination is chosen in a manner that the reactive chemistry combination reacts differently to the interfacial layer and the active layer

Methodology Applied
Scientific EffectChemical reaction:

Data Source

PatentUS20240038582A1SELECTIVE ETCHING PROCESS FOR SiGe AND DOPED EPITAXIAL SILICON
Publication Date: 2024.02.01 QORVO US INC
  • US20240038582A1 patent drawing
  • US20240038582A1 patent drawing
  • US20240038582A1 patent drawing

AI summary

The present disclosure relates to a fabricating procedure of a radio frequency device, in which a precursor wafer including active layers, SiGe layers, and a silicon handle substrate is firstly provided. Each active layer is formed from doped epitaxial silicon and underneath a corresponding SiGe layer. The silicon handle substrate is over each SiGe layer. Next, the silicon handle substrate is removed completely, and the SiGe layer is removed completely. An etch passivation film is then formed over each active layer. Herein, removing each SiGe layer and forming the etch passivation film over each active layer utilizes a same reactive chemistry combination, which reacts differently to the SiGe layer and the active layer. The reactive chemistry combination is capable of producing a variable performance, which is an etching performance of the SiGe layer or a forming performance of the etch passivation film over the active layer.