SiGe MOSFET Gate Stack With Sacrificial Layer for Low Leakage
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Solution Overview
Problem
In semiconductor technology, the integration of silicon germanium (SiGe) channel layers in MOSFET devices faces challenges with gate leakage current and carrier mobility due to Ge atom diffusion into the gate dielectric layer, leading to high interface trap density and unsatisfied bonds, which degrade transistor performance.
Innovation Solution
A cap-free design for the gate dielectric layer is implemented, where a sacrificial semiconductor layer is formed over the SiGe channel layer, allowing Ge atoms to diffuse into it during annealing and then being removed, thereby reducing interface trap density and Ge concentration in the dielectric layer, thus improving the interface quality without SiGe loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a gate dielectric layer is formed directly on SiGe channel layer, then device fabrication is simplified, but Ge atom diffusion into the gate dielectric layer causes high interface trap density and gate leakage current
Solution Approach 1:
A sacrificial semiconductor layer (e.g., silicon layer) is introduced as an intermediary between the SiGe channel layer and the gate dielectric layer. This sacrificial layer acts as a mediator that captures diffusing Ge atoms during annealing, preventing them from reaching the gate dielectric layer. After Ge atom capture, the sacrificial layer is removed, leaving a clean interface with reduced Ge concentration and interface trap density.
Solution Approach 2:
The harmful Ge atoms that have diffused into the sacrificial semiconductor layer are extracted and removed from the system. The sacrificial layer serves as a temporary container for these unwanted Ge atoms, which are then eliminated through removal of the sacrificial layer, thereby purifying the interface between the channel layer and gate dielectric layer.
2Speed
If Ge concentration in the gate dielectric layer is increased to improve mobility, then carrier mobility enhances, but interface trap density increases and transistor performance degrades
Solution Approach 1:
The sacrificial semiconductor layer serves as an intermediary that selectively captures Ge atoms, allowing controlled Ge distribution. This mediator enables the system to achieve desired Ge concentration for mobility enhancement while preventing excessive Ge accumulation that would create interface traps and degrade transistor performance.
Solution Approach 2:
The Ge concentration profile is precisely controlled by adjusting annealing parameters (temperature, time, atmosphere) and sacrificial layer properties (thickness, material composition). This parameter optimization allows achieving the optimal Ge concentration for enhanced carrier mobility while maintaining low interface trap density for good transistor performance.
3Reliability
If annealing temperature is increased to reduce interface traps, then interface quality improves, but Ge atom diffusion into the gate dielectric layer increases
Solution Approach 1:
The sacrificial semiconductor layer acts as a protective intermediary during high-temperature annealing. It serves as a Ge atom sink that captures diffusing Ge atoms, enabling the system to utilize high annealing temperatures for improved interface quality without suffering from harmful Ge diffusion into the gate dielectric layer.
Solution Approach 2:
The Ge atom diffusion, which is normally a harmful effect, is converted into a beneficial process. By directing Ge atoms to diffuse into the sacrificial layer instead of the gate dielectric layer, the high-temperature annealing that would normally cause problems is transformed into a useful process for reducing interface traps and improving interface quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces gate leakage current, enhances carrier mobility, and improves transistor reliability by maintaining high mobility and scalability in advanced technology nodes while minimizing process costs.
Implementation Method 1
allowing Ge atoms to diffuse into it during annealing
Data Source
AI summary
A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer. The first channel layer in the first region includes Ge compound of a first Ge concentration, the second channel layer in the second region includes Ge compound of a second Ge concentration. The first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.