Embedded SiGe Waveguide Structure for Low-Defect Strain Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in fabricating SiGe waveguides lies in the growth of thick Si cladding layers, which leads to SiGe strain loss and unwanted 3D crystal growth due to high thermal budgets, resulting in defects and imperfections that affect optical performance.
Innovation Solution
The fabrication process involves forming trenches in a substrate, performing defect elimination processes, and depositing strained SiGe within these trenches to create a smooth, defect-free structure, eliminating the need for Si cladding on side walls and preventing strain loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If thick Si cladding layers are grown to provide structural support, then waveguide structural stability is improved, but SiGe strain loss and defect formation increase due to high thermal budget
Solution Approach 1:
The patent introduces an intermediary material layer between the SiGe waveguide core and the Si cladding layer. This intermediary layer acts as a buffer that reduces the thermal stress and strain transfer from the thick Si cladding to the SiGe structure during growth, thereby maintaining structural stability while preserving SiGe strain.
Solution Approach 2:
The patent changes the growth parameters by using lower growth temperatures and optimized annealing conditions for the Si cladding layer deposition. This parameter modification reduces the thermal budget impact on the SiGe structure, preventing strain relaxation and dislocation formation while still achieving the required structural support.
2Strength
If high thermal budget is used for Si cladding growth, then structural support is improved, but 3D crystal growth and defects increase
Solution Approach 1:
The patent performs preliminary preparation of the SiGe structure before Si cladding growth, including surface passivation and strain management techniques. This preliminary action prevents the formation of 3D crystal growth and defects during subsequent cladding deposition by ensuring a defect-free interface.
Solution Approach 2:
The patent uses rapid thermal processing and optimized growth cycles that minimize the time the system spends at high temperatures. This rushing through the high-temperature zone reduces the opportunity for 3D crystal growth and defect formation while still achieving the necessary structural support.
3Strength
If conventional Si cladding growth is used, then structural support is achieved, but optical performance deteriorates due to strain relaxation and stacking faults
Solution Approach 1:
The patent modifies growth parameters including temperature, pressure, and gas flow rates during Si cladding deposition to minimize strain relaxation. These parameter changes ensure that the SiGe structure maintains its strained state for optimal optical performance while still receiving structural support from the cladding layer.
Solution Approach 2:
The intermediary layer serves as a strain buffer that decouples the structural support function from the optical active region. This allows the thick Si cladding to provide mechanical strength without transferring strain relaxation or stacking faults to the SiGe waveguide core, thereby preserving optical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method results in SiGe waveguides with controlled sidewalls and reduced defects, improving optical performance by minimizing strain relaxation and stacking faults, thus enhancing waveguide quality.
Implementation Method 1
performing, by the fabrication system, an H2 bake on the surfaces of the trench
Implementation Method 2
the defect elimination process comprises a wet etching of the trench and a thermal oxidation and strip process
Implementation Method 3
the defect elimination process comprises a wet etching of the trench and a thermal oxidation and strip process
Implementation Method 4
depositing, by the fabrication system, SiGe within the trench
Data Source
AI summary
Devices and/or methods of fabrication facilitating suppression of embedded SiGe optical waveguides with low defectivity are provided. In an embodiment, a device can comprise a substrate comprising a trench within the substrate, wherein the trench comprises a base surface and sidewalls comprising the substrate; and a fully strained silicon-germanium (SiGe) structure located within the trench, wherein a bottom surface of the SiGe structure is in contact with the base surface, wherein side surfaces of the SiGe structure are in contact with the sidewalls, and wherein the SiGe structure is at least twice the critical thickness.