Sigma-Delta Modulator Bias Circuit for Lower ADC Power Use
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Solution Overview
Problem
Sigma-delta modulators require lengthy summing intervals for high precision, leading to wasted time and power consumption, and existing methods to reduce power consumption are inadequate.
Innovation Solution
A sigma-delta modulator design utilizing a plurality of bias transistors, including p-type and n-type transistors, configured to receive the same bias voltage, with a voltage regulator generating both the supply and bias voltage, and an amplifier circuit with cascode current sources to optimize power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a sigma-delta modulator uses a lengthy summing interval to achieve high precision digital signal conversion, then measurement precision is improved, but power consumption increases and time efficiency deteriorates
Solution Approach 1:
The patent divides the summing interval into multiple discrete time slots, each handled by a separate transistor. This segmentation allows the modulator to process multiple input samples within a single summing interval, thereby reducing the overall summing interval duration and power consumption while maintaining measurement precision through parallel processing of segmented time portions
2Use of energy by moving object
If multiple transistors with different bias voltages are used in the sigma-delta modulator, then device complexity increases, but power consumption reduction is achieved
Solution Approach 1:
The patent merges the bias voltage generation into a single unified bias voltage source that supplies all transistors. This combining approach reduces device complexity by eliminating multiple separate bias voltage generation circuits while still achieving power consumption reduction through the segmented time-slot processing architecture
3Measurement precision
If the summing interval is extended to achieve high precision conversion, then measurement precision is improved, but time efficiency deteriorates
Solution Approach 1:
The patent implements periodic switching of transistors across discrete time slots within the summing interval. Each transistor operates periodically during its assigned time slot, enabling parallel processing of multiple input samples. This periodic action allows the system to complete high-precision conversion in a shorter total time by utilizing multiple transistors in a time-multiplexed manner
Data Source
AI summary
A sigma-delta modulator and method for converting an input voltage such as an analog signal into a digital signal is presented. The modulator may be used as an analog-to-digital converter (ADC). The modulator has a plurality of bias transistors with at least one p-type transistor and at least one n-type transistor. The modulator receives a bias voltage, wherein each bias transistor receives the same bias voltage. This sigma-delta modulator results in reduced power consumption.