Sigma-Delta Converter Weighting Scheme for High Linearity at Lower OSR

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Solution Overview

Problem

Existing sigma-delta converters face challenges in improving linearity and reducing the Over Sampling Ratio (OSR) while maintaining low noise levels, as higher OSR values increase linearity but at the cost of increased noise for high OSRs.

Innovation Solution

The implementation of a sigma-delta converter with dynamically varying weighting coefficients applied to both the sigma-delta modulator and digital filter, where the weighting coefficients decrease over the conversion phase, allowing for improved linearity and reduced OSR without significantly degrading noise levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the Over Sampling Ratio (OSR) is increased to improve linearity, then linearity is improved, but noise levels increase

Engineering Contradiction:
ImprovelinearityVSAvoidnoise
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies dynamic weighting coefficients that vary over time during the conversion phase. The weighting coefficient decreases as a function of the cycle rank, creating a dynamic weighting scheme that optimizes both linearity and noise performance. This temporal dynamics allows the system to achieve high linearity without requiring excessively high OSR values that would otherwise be needed to compensate for noise.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the weighting parameter dynamically during operation. By applying different weighting coefficients to different cycles of the conversion phase (with weights decreasing as a function of cycle rank), the system optimizes the trade-off between linearity and noise. This parameter change approach allows achieving improved linearity at moderate OSR values rather than requiring high OSR that would amplify noise.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the Over Sampling Ratio (OSR) is decreased to reduce converter complexity, then device complexity is reduced, but linearity deteriorates

Engineering Contradiction:
Improveconverter complexityVSAvoidlinearity
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The dynamic weighting scheme allows the converter to achieve high linearity performance with reduced OSR values. By varying the weighting coefficient over time (decreasing with cycle rank), the system compensates for the reduced oversampling, maintaining high linearity while operating at lower, less complex OSR values.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs time-varying weighting parameters that decrease as a function of cycle rank. This parameter modulation enables the converter to achieve high linearity performance without requiring high OSR values, thus reducing overall device complexity while maintaining measurement precision.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If the duration of conversion cycles is reduced to increase conversion speed, then productivity is improved, but the contribution of internal analog signal becomes insufficient

Engineering Contradiction:
Improveconversion speedVSAvoidsignal contribution
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent uses dynamic weighting coefficients that compensate for reduced integration time. By applying higher weights to earlier cycles and progressively decreasing weights, the system maintains adequate signal contribution even when cycle durations are shortened to increase conversion speed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The weighting parameter is changed dynamically based on cycle rank, allowing the system to maintain reliable signal contribution levels even with reduced cycle durations. The decreasing weight function compensates for the reduced integration time in shorter cycles, preserving signal integrity while enabling faster conversion.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10153778B2High-linearity sigma-delta converter
Publication Date: 2018.12.11 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • US10153778B2 patent drawing
  • US10153778B2 patent drawing
  • US10153778B2 patent drawing

AI summary

A sigma-delta converter including a sigma-delta modulator including at least one analog filter capable, for each cycle of a conversion phase, of receiving an internal analog signal originating from the analog input signal and of supplying an analog output signal, wherein: the contribution of the internal analog signal to the output value of the filter is smaller at a given cycle of the conversion phase than at a previous cycle, the contributions to the different cycles being governed by a first predetermined law which is a function of the rank of the cycle; and the duration of a given cycle of the conversion phase is shorter than the duration of a previous cycle, the durations of the different cycles being governed by a second predetermined law which is a function of the rank of the cycle in the conversion phase.