Sigma-Delta ADC Range Refinement for High-Resolution Conversion
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Solution Overview
Problem
Existing analog-to-digital converters (ADCs) face challenges in achieving high resolution over large dynamic ranges, as increasing the input signal range leads to higher quantization noise and increased cost, power consumption, and conversion time, especially when using sigma-delta modulators.
Innovation Solution
The method involves iteratively refining the dynamic range of a sigma-delta modulator by defining narrower subranges based on amplitude estimates, adjusting the operation parameters of the feedback digital-to-analog converter, and resetting the modulator in each iteration to achieve accurate digital output without increasing energy or time requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the input signal range is increased to handle larger amplitude signals, then the dynamic range is improved, but the quantization noise increases and resolution deteriorates
Solution Approach 1:
The patent applies dynamic range adjustment by modifying the feedback DAC operation parameters (such as feedback gain or reference voltage) based on the observed input signal amplitude. This allows the ADC to adapt its dynamic range to match the actual signal level, thereby maintaining high resolution regardless of whether the input signal is large or small. The feedback loop dynamically reconfigures to optimize the quantization step size for the current signal amplitude.
Solution Approach 2:
The invention changes operational parameters of the feedback DAC (such as feedback gain, reference voltage, or capacitor bank configuration) according to the input signal amplitude. By adjusting these parameters, the system can maintain an optimal quantization noise floor across a wide range of input signal amplitudes, effectively resolving the contradiction between handling large signals and maintaining high resolution.
2Measurement precision
If the ADC resolution is increased to maintain high precision over large dynamic range, then the measurement precision is improved, but the cost and power consumption increase
Solution Approach 1:
Instead of using a high-resolution fixed-configuratio n ADC, the patent employs a dynamic reconfiguration mechanism that adjusts the feedback DAC parameters based on signal amplitude. This allows a lower-resolution ADC to achieve high effective resolution by adapting its characteristics to the input signal, thereby reducing power consumption while maintaining precision.
Solution Approach 2:
The system changes the operational parameters of the feedback path (such as feedback gain or reference voltage levels) to match the input signal amplitude. This parameter adaptation enables the use of a simpler, lower-power ADC architecture that can still achieve high resolution through dynamic adjustment rather than relying on high inherent bit depth.
3Measurement precision
If the ADC resolution is increased to maintain high precision over large dynamic range, then the measurement precision is improved, but the conversion speed decreases
Solution Approach 1:
The patent uses dynamic parameter adjustment of the feedback DAC to maintain high resolution without requiring a high-bit ADC. Since the adjustment is performed in the feedback loop during normal operation rather than requiring additional conversion stages, the conversion speed is maintained while achieving high effective resolution through adaptive dynamic range control.
Data Source
AI summary
The invention describes a method of performing analog-to-digital conversion on an input signal (Pin) within a range (R1) using a sigma-delta modulator (1) comprising a feedback digital-to-analog conversion arrangement (12, 120), which method comprises the steps of: obtaining an amplitude estimate (E1, E2, E3, E4) of the input signal (Pin); defining a subsequent subrange (R2, R3, R4) on the basis of the amplitude estimate (E1, E2, E3); and adjusting operation parameters of the feedback digital-to-analog conversion arrangement (12, 120) on the basis of the subsequent subrange (R2, R3, R4); whereby the method steps are repeated a predefined number of iterations (N). The invention further describes a sigma-delta modulator (1), an analog-to-digital converter (50), and a monitoring device (5) for monitoring an analog input signal (Pin).