Signal Acquisition Managing Device for Microcontroller Load Reduction

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Solution Overview

Problem

The existing signal acquisition techniques in PWM-driven systems, such as three-phase motors, significantly increase the computational load on microcontroller cores due to the management of acquisition operations within Interrupt Service Routines.

Innovation Solution

A processor system with a signal acquisition managing device that includes a trigger generation unit and a scheduler unit, which receives state signals, generates synchronized command signals, and performs actions to reduce the computational load by managing signal acquisition operations independently of the processor core.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the microcontroller core manages signal acquisition operations within Interrupt Service Routines, then the system can acquire state variables at pre-established instants, but the computational load of the microcontroller core significantly increases

Engineering Contradiction:

Improvesignal acquisition timing precisionVSAvoidcomputational load on microcontroller core

Core Design Contradiction:

Measurement precisionVSProductivity

Solution Approach 1:

The patent extracts the signal acquisition management function from the microcontroller core and implements it in a dedicated peripheral module. This peripheral module independently generates trigger signals, manages timing, and controls analog-to-digital converters without requiring interrupt service routines, thereby removing the computational burden from the microcontroller core while maintaining precise acquisition timing.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a dedicated peripheral module as an intermediary between the microcontroller core and the signal acquisition components (timers, analog-to-digital converters). This intermediary handles all timing-critical operations and signal synchronization, allowing the microcontroller core to focus on control algorithms without being burdened by acquisition management overhead.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Loss of time

If the microcontroller core executes Interrupt Service Routines to synchronize acquisition operations, then state variables can be acquired at the correct instants, but acquisition performance is degraded due to latency

Engineering Contradiction:

Improveacquisition timing accuracyVSAvoidacquisition performance

Core Design Contradiction:

Loss of timeVSReliability

Solution Approach 1:

The patent implements preliminary action by pre-configuring the peripheral module with all necessary timing parameters, trigger patterns, and synchronization settings before acquisition begins. The peripheral module autonomously executes pre-planned acquisition sequences without waiting for interrupt requests, eliminating the latency inherent in interrupt-driven approaches and ensuring timely data capture.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8185773B2Processor system employing a signal acquisition managing device and signal acquisition managing device

Publication Date: 2012.05.22 STMICROELECTRONICS SRL

AI summary

A processor system having a processor core configured to control an external apparatus in accordance with a control algorithm; a signal acquisition managing device configured to receive state signals provided by the apparatus, perform corresponding actions, and generate corresponding synchronized command signals; and a peripheral module structured to receive the synchronized command signals and generate output signals to be processed by the processor core in accordance with the control algorithm.