Signal-Comparison Circuit Calibration for Offset and Delay Errors
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Solution Overview
Problem
Existing circuit calibration methods face inefficiencies in testing circuit nodes for input offset voltage and signal delay, particularly due to accidental shorting risks and imprecision of signal-comparison circuits, which affect measurement accuracy and reliability.
Innovation Solution
An apparatus with calibration circuitry that uses complementary input ports to compare monotonously rising and falling wave reference signals with voltage-test signals, processing output signals to set adjustments for signal paths to account for input offset voltage, signal delay, and crosstalk voltage, thereby enhancing measurement accuracy and reducing shorting risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ADC connects to one circuit node at a time to measure voltage, then measurement capability is achieved, but testing efficiency is reduced and accidental shorting risk increases
Solution Approach 1:
The patent divides the measurement function into multiple independent signal-comparison circuits, each capable of measuring a different circuit node simultaneously. This segmentation allows parallel testing of multiple nodes without requiring sequential ADC connections, thereby improving testing efficiency while maintaining measurement accuracy through dedicated comparison circuits for each node.
Solution Approach 2:
The patent introduces matrix circuitry as an intermediary that selectively connects circuit nodes to signal-comparison circuits. This matrix acts as a smart switch fabric that can establish multiple independent measurement paths simultaneously, enabling efficient parallel testing while preventing accidental shorting through controlled connection management that ensures proper isolation between measurement paths.
2Measurement precision
If signal-comparison circuits are used to test circuit nodes, then measurement capability is provided, but measurement precision deteriorates due to input offset voltage and signal delay
Solution Approach 1:
The patent implements calibration circuitry that performs preliminary calibration of signal-comparison circuits before actual measurements. This calibration process measures and compensates for input offset voltages and signal delays in advance, storing correction values that are applied during subsequent measurements. This preliminary action eliminates the negative effects of offset voltage and delay, thereby improving both measurement precision and reliability.
Solution Approach 2:
The patent employs feedback mechanisms where calibration measurements of offset voltage and signal delay are fed back into the measurement system. The calibration circuitry continuously monitors these parameters and adjusts the measurement results accordingly, creating a closed-loop system that maintains high measurement precision despite variations in offset voltage and signal delay over time and temperature.
Data Source
AI summary
An example apparatus includes a circuit and calibration circuitry. The circuit has complementary input ports to receive input signals including a monotonously rising and/or falling wave reference signal and a voltage-test signal to test at least one direct current (DC) voltage associated with the circuit by comparing the input signals using a first polarity and second polarity associated with the circuit to produce a first output signal and a second output signal. During operation, the circuit manifests an input voltage offset and a signal delay with each comparison of the input signals. The calibration circuitry processes the first and second output signals and, in response, calibrates or sets an adjustment for at least one signal path associated with the circuit in order to account for the input offset voltage and signal delay during normal operation of the circuit.