Signal Compensation Circuit for Semiconductor Stability

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Solution Overview

Problem

Semiconductor apparatuses face signal degradation and operational failures due to continuous power application, leading to abnormal signal generation and performance deterioration in circuit blocks configured with transistors.

Innovation Solution

A signal compensation circuit is introduced, comprising a first path, a delay block, and a signal combination block, which delays and combines signals to generate a compensated column strobe signal, stabilizing pulse width variations and ensuring stable signal generation across varying operation conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If continuous power is applied to transistors in circuit blocks, then the circuit blocks remain ready to operate, but transistor degradation occurs and signal properties deteriorate

Engineering Contradiction:
Improvecircuit block readinessVSAvoidtransistor property stability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements periodic switching of power supply to circuit blocks based on operation modes. Power is continuously supplied only to actively operating circuit blocks, while standby blocks receive intermittent power. This periodic power management prevents transistor degradation in inactive blocks while maintaining readiness of active blocks, resolving the contradiction between operational readiness and reliability.

Inventive Principle:
Principle #19Periodic action

2Reliability

If circuit blocks operate only when functions are performed, then transistor degradation is reduced, but signal generation may become abnormal due to property degradation

Engineering Contradiction:
Improvetransistor property stabilityVSAvoidabnormal signal generation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent employs feedback mechanisms that monitor signal properties from circuit blocks. When abnormal signals are detected due to transistor degradation, the system automatically adjusts power supply timing and duration to prevent further degradation. This closed-loop feedback control ensures signal quality while minimizing power application to inactive blocks, addressing both reliability and abnormal signal generation concerns.

Inventive Principle:
Principle #23Feedback

3Productivity

If power is continuously applied to maintain circuit blocks in operational state, then operation performance is maintained, but transistor stresses increase and properties degrade

Engineering Contradiction:
Improveoperation performanceVSAvoidtransistor property stability
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The patent dynamically adjusts power supply characteristics based on real-time operation mode detection. Circuit blocks transition between continuous power supply during active operations and intermittent power during standby states. This dynamic power management maintains optimal operation performance when needed while reducing transistor stress during idle periods, resolving the contradiction between productivity and component strength.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9564191B1Signal compensation circuit and semiconductor apparatus using the same
Publication Date: 2017.02.07 MIMIRIP LLC
  • US9564191B1 patent drawing
  • US9564191B1 patent drawing
  • US9564191B1 patent drawing

AI summary

A signal compensation circuit includes a first path configured to cause a source signal to pass therethrough and be outputted as a first signal; a delay block configured to output a second signal by delaying the source signal by a predetermined time; a second path configured to cause the second signal to pass therethrough and be outputted as a third signal; and a signal combination block configured to generate a compensated signal by combining the first signal and the third signal.