Signal Flow Graph Pruning for Ultra-Large Circuit Sensitivity Analysis

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Solution Overview

Problem

Current methods for ultra-large transistor level electrical circuit verification, such as statistical simulation combined with Monte-Carlo analysis, are too complex and slow for very large-scale circuits, making them impractical for high-performance electronic design automation in silicon design technology beyond 65 nanometer feature sizes.

Innovation Solution

A pared-down combination of statistical simulation and Monte-Carlo analysis is achieved through signal flow graph pruning, where sensitivity analysis is used to identify and isolate sensitivity paths, allowing for a single traversal of the graph and reducing complexity to near linear, enabling efficient analysis of large-scale circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If statistical simulation combined with Monte-Carlo analysis is used for ultra-large transistor level electrical circuit verification, then measurement precision is improved, but device complexity and computation time increase making it impractical for very large-scale circuits

Engineering Contradiction:
Improveaccuracy of sensitivity analysisVSAvoidcomplexity of analysis process
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The signal flow graph is divided into partitions based on sensitivity paths. The pruning algorithm segments the graph by identifying vertices that lie on sensitivity paths (from primary inputs to sensitivity variables/parameters) and separating them from vertices that do not. This segmentation allows the analysis to focus only on relevant portions of the circuit, reducing complexity while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention extracts and removes vertices and edges that do not contribute to sensitivity analysis from the signal flow graph. By identifying and eliminating non-sensitivity path elements, the analysis complexity is reduced to near-linear levels while preserving the accuracy needed for ultra-large circuit verification.

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If statistical simulation combined with Monte-Carlo analysis is applied to very large-scale circuits, then measurement precision is improved, but productivity deteriorates due to excessive runtime

Engineering Contradiction:
Improveaccuracy of sensitivity analysisVSAvoidsimulation speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The signal flow graph is segmented into sensitivity-related and non-sensitivity-related portions. By partitioning the graph based on sensitivity paths, the simulation can process only the necessary vertices and edges, achieving near-linear complexity and significantly improving simulation speed for ultra-large circuits while maintaining measurement precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention applies partial action by performing sensitivity analysis only on vertices that lie on sensitivity paths, rather than analyzing the entire signal flow graph. This selective approach achieves the necessary measurement precision with significantly reduced computation time, enabling productivity for very large-scale circuits.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If a comprehensive signal flow graph analysis is performed on all vertices and edges, then measurement precision is improved, but device complexity increases making the process too slow for practical use

Engineering Contradiction:
Improveaccuracy of circuit verificationVSAvoidsimulation runtime
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The invention performs preliminary action by pre-identifying sensitivity paths from primary inputs to sensitivity variables or parameters before conducting the full analysis. This preliminary identification allows the subsequent analysis to focus only on relevant vertices and edges, reducing runtime while maintaining comprehensive accuracy for circuit verification.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention applies partial action by limiting the analysis to only those vertices and edges that lie on sensitivity paths, rather than performing comprehensive analysis on the entire signal flow graph. This selective approach achieves necessary measurement precision with significantly reduced time loss, making the process practical for ultra-large circuits.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS7421671B2Graph pruning scheme for sensitivity analysis with partitions
Publication Date: 2008.09.02 ORACLE AMERICAN INC
  • US7421671B2 patent drawing
  • US7421671B2 patent drawing
  • US7421671B2 patent drawing

AI summary

A method of analyzing a circuit simulation comprising pruning a signal flow graph. Pruning the signal flow graph includes selecting a current vertex from a multiple input vertices in the signal flow graph. Each one of the input vertices is connected to a primary input of the signal flow graph. Determining if the current vertex includes at least one of a sensitivity parameter or a sensitivity variable. If the current vertex includes at least one of a sensitivity parameter or a sensitivity variable then the current vertex is identified as being part of a sensitivity path and is added to a first sub-group of vertices. Pruning the signal flow graph also includes determining if any remaining non-visited neighbor vertices remain to be analyzed. If any remaining non-visited neighbor vertices remain to be analyzed then selecting a neighboring vertex and determining if the selected neighbor vertex is identified as a sensitivity path. If the selected neighbor vertex is identified as a sensitivity path, then the first sub-group of vertices are output into a final pruned signal flow graph. A system for simulating and analyzing a circuit is also disclosed.