Signal Path Verification Device for Test Configurations

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Solution Overview

Problem

The complexity of configuring test devices for control units in the automotive and aviation industries often leads to potential hardware risks due to misconfiguration, requiring extensive measurement and simulation runs to verify signal paths, which is time-consuming and inefficient.

Innovation Solution

A method and device for configuring an input/output interface in test devices that allows for immediate verification of signal path configurations through graphical representation, test signal propagation, and automatic code generation, enabling flexible and efficient design of test phases for control units, including partial configuration verification before hardware connection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If extensive measurement and simulation runs are performed to verify signal paths, then hardware risks are reduced, but time consumption and inefficiency increase

Engineering Contradiction:
Improvehardware safetyVSAvoidverification time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary verification of signal path configurations by propagating test signals through the configured signal paths before actual hardware connection. The system allows users to define test signals at input ports, automatically propagates them through the configured signal paths, and displays results at output ports, enabling configuration errors to be detected and corrected before hardware deployment, thus preventing hardware risks while reducing the need for extensive post-connection measurement and simulation runs

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a virtual copy of the signal path configuration in the form of a graphical representation that mirrors the actual signal flow. This visual model allows users to verify configurations by observing test signal propagation through the graphical interface, eliminating the need for physical hardware connection and extensive measurement runs, thereby reducing verification time while maintaining reliability

Inventive Principle:
Principle #26Copying

2Measurement precision

If elaborate measurements are performed to verify signal path configurations, then configuration correctness is ensured, but the process becomes time-consuming and inefficient

Engineering Contradiction:
Improveconfiguration verification accuracyVSAvoidconfiguration efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent implements an automated self-verification system where the test device automatically propagates test signals through configured signal paths and displays verification results without requiring external measurement equipment or manual simulation runs. The system self-tests the configuration by injecting test signals at input ports, automatically routing them through the configured signal paths, and displaying output results, thereby ensuring configuration correctness while dramatically improving productivity

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent incorporates immediate feedback mechanisms by displaying test signal propagation results directly on the graphical representation of the signal path. When test signals are propagated through the configured signal paths, the system visually indicates the signal flow and output values, providing instant feedback on configuration correctness without requiring separate measurement steps, thus maintaining verification accuracy while enhancing configuration efficiency

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10268625B2Signal path verification device
Publication Date: 2019.04.23 DSPACE SE & CO KG
  • US10268625B2 patent drawing
  • US10268625B2 patent drawing
  • US10268625B2 patent drawing

AI summary

An input/output interface of a test device is configured, wherein the input/output interface is developed for connecting a hardware unit to a behavioral model present in the test device. The method includes the steps of: displaying a graphical representation of the input/output interface as a signal path between a hardware port for connection of the hardware and at least one model port for connecting the behavioral model via a selectable input/output function; receiving a first configuration for the signal path; receiving a test value that is predefinable at the hardware port or the model port of the signal path, but, for example, is also predefinable through the graphical representation of the hardware port or the model port; propagating a test signal associated with the test value along the signal path according to the first configuration for the signal path, and displaying the propagated test signal on the graphical representation of the model port or the hardware port.