Signal Processing Circuit With Resistive Random Access Memory
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Solution Overview
Problem
Existing variable-resistance circuits in computing systems, such as resistive random access memory, lack flexibility in controlling their working status, making it difficult to manage resistance changes effectively, especially after power failures.
Innovation Solution
A signal processing circuit using two switching devices and a resistive random access memory, allowing for flexible switching between resistance-variability and resistance-invariability states, enabling the circuit to manage multiple groups of input signals and maintain data storage capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If resistive random access memory is used to ensure resistance does not change after power failure, then data storage reliability is improved, but flexibility in controlling working status deteriorates
Solution Approach 1:
The patent introduces two switching devices that dynamically control the connection states of the resistive random access memory. The first switching device controls connection between first and second ends, while the second switching device controls connection between first and third ends. This dynamic switching capability allows the system to transition between different working modes (storage mode and processing mode), resolving the contradiction between reliability and flexibility by making the system adaptable through controlled dynamic reconfiguration.
2Stability of the object's composition
If resistive random access memory is used to maintain resistance after power failure, then non-volatile data storage is improved, but control over resistance variability deteriorates
Solution Approach 1:
The patent introduces switching devices as intermediary components between the control system and the resistive random access memory. These switching devices act as mediators that enable controlled access to the memory's resistance variability. By using the switching devices as intermediaries, the system can selectively enable or disable resistance changes in the memory, thus maintaining resistance stability when needed while allowing controlled variability when processing requires it.
Data Source
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AI summary
A circuit (100) is provided. A first end (108) of a resistive random access memory (102) included in the circuit (100) is a first end of the circuit (100), and a second end (116) of the resistive random access memory is connected to a first end (118) of a first switching device (104) and a first end (120) of a second switching device (106) separately, where a threshold voltage of the resistive random access memory (102) is U; a second end (112) of the first switching device (104) is a second end of the circuit; a second end of the second switching device (106) is a third end (110) of the circuit; the first switching device (104) further includes a first control end (114); the second switching device (106) further includes a second control end (122); and the first control end (114) and the second control end (122) are configured to make the first switching device (104) closed and make the second switching device (106) open at the same time, or to make the first switching device (104) open and make the second switching device (106) closed at the same time. Therefore, a working status of the resistive random access memory (102) is flexibly controlled.