Silicide Capacitive MEMS Structure for Nanometer Gap Formation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional capacitive micro-machined ultrasonic transducers (CMUTs) face challenges in producing nanometer-scale gaps due to limitations in etching processes, and there are concerns about maintaining electrical connections between electrodes and external circuits during the annealing process.
Innovation Solution
The proposed silicide capacitive micro electromechanical structure includes a substrate, passivation layer, silicon layer, first metal layer with a contact and conductive part, and a dielectric layer. After forming these layers, an annealing process is performed, which results in a silicidation gap and maintains electrical connection to external circuits through the conductive part.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical wet/dry etching is used to produce CMUT gaps, then gaps can be formed, but the liquid etchant tends to stick and stay on the components or requires longer release time due to mass transport rate limitations
Solution Approach 1:
The patent changes the fundamental mechanism from chemical etching to thermal annealing-induced silicidation. By changing the process parameter from chemical reaction to thermal diffusion, the gap formation achieves both precision and speed without mass transport limitations
Solution Approach 2:
The patent replaces the chemical etching system with a thermal annealing system. The mechanical/chemical process of etchant removal is substituted by a thermal process where silicon atoms diffuse into the metal layer during annealing, forming silicide and creating gaps without liquid etchants
2Reliability
If metal is deposited directly under the silicon as the bottom electrode, then electrical connection is established, but silicon atoms might be involved in the silicidation process, resulting in incomplete silicidation and inability to form a complete gap
Solution Approach 1:
The patent segments the metal layer into two distinct parts: a bottom electrode layer that remains as metal for electrical connection, and a metal silicide layer that forms the gap. This segmentation allows the bottom electrode to maintain electrical connection while the silicide layer completes the gap formation
Solution Approach 2:
The patent applies different properties to different regions of the metal layer. The region in contact with silicon undergoes silicidation to form the gap, while the bottom electrode region maintains its metallic properties for electrical connection. This local differentiation resolves the contradiction between gap formation and electrical connectivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively forms nanometer-scale gaps without the need for etching processes, while ensuring that electrical connections remain intact, thus enhancing production efficiency and reducing manufacturing costs.
Implementation Method 1
the first metal layer includes a contact part and a conductive part. The contact part contacts at least partial of the silicon layer and the conductive part extends away from the silicon layer to be electrically connected to an external circuit. After performing an annealing process, the electrical connection to the external circuit remains by having the conductive part stay contacting the silicon layer after silicidation reaction.
Data Source
AI summary
The invention provides a silicide capacitive micro electromechanical structure and fabrication method thereof, comprising a substrate, a passivation layer, a silicon layer, a first metal layer, and a dielectric layer. The passivation layer is formed on the substrate; the silicon layer and the first metal layer are formed on the passivation layer. The first metal layer includes a contact part and a conductive part. The contact parts contact at least a part of the silicon layer, and the conductive portion extends away from the silicon layer to electrically connect an external circuit. The dielectric layer is formed on the passivation layer, and at least the silicon layer and the first metal layer are covered by the dielectric layer. After an annealing process is performed, the conductive portion remains in contact with the silicon layer after the silicidation reaction to maintain an electrical connection with the external circuit.