Silicide Fuse Memory Cell for Low-Current OTP Programming
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Solution Overview
Problem
Existing one-time programmable (OTP) devices face challenges in shrinking technology nodes and low-power applications due to high programming currents and large transistor widths, which hinder their scalability and efficiency.
Innovation Solution
The design incorporates a fuse element with a silicide portion and a silicon portion that extends between electrode nodes, utilizing a high resistance structure with a silicide-containing line and a dielectric material to reduce programming current and transistor size, allowing for smaller cell size and lower power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional fuse structures are used in OTP devices, then reliable programming can be achieved, but programming current is high and transistor width is large
Solution Approach 1:
The fuse element is segmented into multiple sections with different resistance values. Specifically, the fuse includes a first fuse section and a second fuse section with different cross-sectional areas, creating distinct resistance regions. This segmentation allows the programming current to be distributed and reduced while maintaining sufficient total resistance for reliable programming, resolving the contradiction between low programming current and reliable programming.
Solution Approach 2:
Different portions of the fuse element are given different local properties through varying cross-sectional areas. The first fuse section has a larger cross-sectional area (lower resistance) while the second fuse section has a smaller cross-sectional area (higher resistance). This local quality variation enables the fuse to achieve both low overall programming current requirements and sufficient resistance for reliable bit programming, addressing the contradiction between energy consumption and programming reliability.
2Area of moving object
If conventional fuse structures are used in OTP devices, then programming can be performed, but cell size is large
Solution Approach 1:
The fuse structure utilizes vertical dimension variations through different cross-sectional areas at different portions of the fuse element. By varying the cross-sectional area in the vertical dimension rather than requiring larger horizontal dimensions, the cell footprint is reduced while maintaining the necessary resistance characteristics for efficient programming, thus resolving the contradiction between small cell size and programming efficiency.
Solution Approach 2:
The fuse element employs a composite structure with regions of different cross-sectional areas, effectively creating a composite resistance profile within a single continuous element. This composite design allows optimization of both space (smaller cell size) and performance (programming efficiency) by strategically placing high-resistance and low-resistance sections within the constrained cell area.
3Use of energy by moving object
If fuse element resistance is increased to reduce programming current, then programming current decreases, but cell area increases
Solution Approach 1:
Instead of uniformly increasing resistance throughout the fuse element (which would require larger area), the invention applies local quality variation by creating specific high-resistance sections with reduced cross-sectional area. The first fuse section maintains larger area for low resistance, while the second fuse section has reduced area for high resistance. This localized approach achieves the necessary total resistance for low programming current without proportionally increasing the overall cell area.
Solution Approach 2:
The fuse element is divided into segmented sections with different resistance characteristics. This segmentation allows the high-resistance portion to be concentrated in a compact second section rather than distributed throughout a larger area. The first section provides low-resistance current path while the second section provides high-resistance programming characteristic, achieving low programming current with minimized cell area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the programming current by 95% and cell size by 70%, enabling high-density applications without area sacrifice and supporting low-power products while maintaining reliable logic states.
Implementation Method 1
causing, by the current, an electron-migration effect to form an extended silicide-containing portion within the gap
Data Source
AI summary
A method of programming a memory cell includes causing a current to flow through a first silicide-containing portion and a second silicide-containing portion of the memory cell; and causing, by the current, an electron-migration effect to form an extended silicide-containing portion within the gap such that the memory cell is converted from a first state into a second state. The memory cell includes a silicon-containing line continuously extending between a first region and a second region; the first silicide-containing portion over the silicon-containing line and adjacent to the first region; and the second silicide-containing portion over the silicon-containing line and adjacent to the second region. The first silicide-containing portion and the second silicide-containing portion are separated by a gap if the memory cell is at the first state. The extended silicide-containing portion extends from the second silicide-containing portion towards the first silicide-containing portion.


