Silicide Gate Sidewall Expansion Control via Negative Slope Etching
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Solution Overview
Problem
The expansion of sidewalls in the silicide layer during the light oxidation process after gate patterning leads to short circuits and reliability issues in semiconductor devices, particularly due to the oxidation of tungsten silicide layers, which affects hot carrier characteristics and device operation.
Innovation Solution
A method involving the sequential formation of a gate insulation layer, a polysilicon layer, a tungsten silicide layer, and a hard mask layer, followed by selective patterning and etching to achieve a negatively sloped cross-sectional etch profile for the silicide layer, thereby controlling the light oxidation process to prevent excessive sidewall expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a light oxidation process is performed after gate patterning to improve device reliability, then hot carrier characteristics and device operation speed are improved, but the sidewalls of the silicide layer expand excessively causing short circuits
Solution Approach 1:
The patent applies preliminary action by forming a protective oxide layer on the silicide layer sidewalls before the light oxidation process. This protective layer prevents excessive oxidation and sidewall expansion during the subsequent light oxidation step, while still allowing the process to improve device reliability through controlled gate oxidation.
Solution Approach 2:
The patent applies local quality by selectively oxidizing only specific regions - the gate insulation layer at the gate edge sides - while protecting the silicide layer sidewalls from excessive oxidation. This localized approach allows the light oxidation process to improve device characteristics without causing harmful sidewall expansion.
2Reliability
If the gate insulation layer thickness is increased at the edge sides to improve device characteristics, then hot carrier and sub-threshold characteristics are improved, but the silicide layer sidewalls expand and cause short circuits
Solution Approach 1:
The patent forms a protective oxide layer on the silicide layer sidewalls before the light oxidation process, preventing excessive oxidation that would lead to short circuits. This preliminary protection allows the gate insulation layer to be properly oxidized at the edge sides to improve hot carrier characteristics without causing harmful sidewall expansion.
Solution Approach 2:
The protective oxide layer acts as an intermediary between the silicide layer and the oxidizing environment during the light oxidation process. It mediates the oxidation process by protecting the silicide layer sidewalls from excessive oxidation while allowing the necessary oxidation to occur at the gate edge sides to improve device characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the excessive expansion of the tungsten silicide layer sidewalls, minimizing the risk of short circuits during subsequent contact processes and enhancing the reliability and performance of semiconductor devices by maintaining a vertical gate profile.
Implementation Method 1
performing a light oxidation process to oxidize exposed sidewalls of the polysilicon layer and the silicide layer
Data Source
AI summary
A method for fabricating a semiconductor device with a gate is provided. The method includes: forming a gate insulation layer over a substrate; sequentially forming a polysilicon layer, a silicide layer and a hard mask layer over the gate insulation layer; selectively patterning the hard mask layer; etching the silicide layer using the patterned hard mask layer as a mask such that the silicide layer has a cross-sectional etch profile that is negatively sloped; etching the polysilicon layer using the patterned hard mask layer as a mask to form a gate; and performing a light oxidation process to oxidize exposed sidewalls of the polysilicon layer and the silicide layer.