Silicide Layer Thermal Resistance in 3D Semiconductor Memory
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Solution Overview
Problem
The challenge in manufacturing three-dimensional semiconductor memory devices is the warping of substrates due to the thermal expansion mismatch between silicon and metallic materials, which complicates the high-yield production and increases the risk of junction failure from high-temperature silicide layer agglomeration.
Innovation Solution
The use of a silicide layer with a higher temperature resistance, such as a dual silicide layer including metal atoms with larger atomic radii like platinum, reduces thermal stress and agglomeration, and a laminated structure with alternating conducting layers and insulating layers helps mitigate substrate warping, while specific manufacturing processes like thermal silicidation and void formation in polysilicon layers enhance electrical conductivity and reduce resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metallic materials are used in the semiconductor memory device, then electrical conductivity is improved, but substrate warping occurs due to thermal expansion mismatch with silicon
Solution Approach 1:
The patent employs a composite material structure consisting of alternating silicon layers and insulating layers. This composite structure replaces traditional metallic interconnects, eliminating the thermal expansion mismatch between metals and silicon that causes substrate warping, while maintaining electrical conductivity through the silicon-based composite pathway
2Reliability
If high-temperature processing is applied to form silicide layers, then electrical conductivity is improved, but junction failure occurs due to silicide layer agglomeration
Solution Approach 1:
The patent changes the material composition parameters of the silicide layer by incorporating metal atoms with larger atomic radii (such as platinum group metals). This parameter change increases the melting point and thermal stability of the silicide layer, allowing it to withstand high-temperature processing without agglomeration while achieving the desired electrical conductivity
Solution Approach 2:
The patent creates a composite silicide layer structure that combines silicon with metal atoms of larger atomic radii. This composite material exhibits enhanced thermal stability and resistance to agglomeration compared to traditional silicide layers, enabling high-temperature processing without junction failure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces substrate warping, lowers the sheet resistivity of the silicide layer, and minimizes junction failure, enabling more reliable and efficient production of three-dimensional semiconductor memory devices.
Implementation Method 1
the warping of substrates due to the thermal expansion mismatch between silicon and metallic materials
Implementation Method 2
the thermal expansion mismatch between silicon and metallic materials
Implementation Method 3
specific manufacturing processes like thermal silicidation and void formation in polysilicon layers enhance electrical conductivity and reduce resistance
Data Source
AI summary
According to embodiments, a semiconductor memory device includes a plurality of control gate electrodes laminated on a substrate. A first semiconductor layer has one end connected to the substrate, has a longitudinal direction in a direction intersecting with the substrate, and is opposed to the plurality of control gate electrodes. An electric charge accumulating layer is positioned between this control gate electrode and the first semiconductor layer. A first contact has one end connected to the substrate and another end connected to a source line. A second contact has one end connected to the substrate and another end connected to a wiring other than the source line. The first contact includes a first silicide layer arranged on the substrate. The second contact includes a second silicide layer arranged on the substrate. The first silicide layer has a higher temperature resistance than the second silicide layer.