Silicon Brain 3D Neural Memory for Neumann Bottleneck Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor memory devices face limitations in integrating memory cells due to the Neumann bottleneck and high power consumption, especially when attempting to replicate the neural network structure of the human brain, which results in inefficient information processing and increased computational load.
Innovation Solution
A three-dimensional network architecture is implemented on a silicon chip, utilizing interconnected modules of cells and select gates along multiple axes, with specific voltage applications to mimic the synaptic connections of the human brain without converting information to bit data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional semiconductor memory devices are used to store information in binary units, then the storage capacity can be increased, but the information processing efficiency decreases and power consumption increases
Solution Approach 1:
The patent transitions from two-dimensional binary memory storage to three-dimensional continuous value storage. Memory cells are arranged in 3D space with X, Y, and Z addresses, enabling continuous value representation instead of discrete binary states. This dimensional expansion allows simultaneous storage of magnitude and sign information, dramatically improving processing efficiency while maintaining high storage capacity.
Solution Approach 2:
The invention changes the storage parameter from discrete binary values (0 or 1) to continuous values representing physical quantities with magnitude and direction. Each memory cell stores a continuous value that can represent both the amount and polarity of information, eliminating the need for separate sign bit storage and enabling direct analog computation.
2Adaptability or versatility
If conventional semiconductor memory devices are used to replicate neural network structures, then the computational capacity can be increased, but the power consumption increases due to the Neumann bottleneck
Solution Approach 1:
The patent merges storage and processing functions into a unified three-dimensional memory architecture. By enabling continuous value storage and direct in-memory computation, it eliminates the separation between storage and processing units that causes the Neumann bottleneck, thereby reducing data transfer overhead and power consumption while maintaining high computational capacity.
Solution Approach 2:
The invention replaces the mechanical data transfer mechanism between separate storage and processing units with direct in-memory computation. Continuous values stored in 3D-addressed memory cells can be directly processed without being transferred to external processors, substituting the mechanical bus system with localized computational capabilities.
3Ease of manufacture
If two-dimensional memory cell arrays are used, then the manufacturing process is simpler, but the integration density and information capacity are limited
Solution Approach 1:
The patent extends the memory cell array from two-dimensional to three-dimensional space by adding the Z-address dimension. This allows memory cells to be stacked or arranged in multiple layers, significantly increasing integration density without complicating the basic cell structure. The continuous value storage capability further enhances information capacity per physical cell.
Data Source
AI summary
The basis of calculating memory capacity of modern computing is bit. Thus, the number of bits is the unit of information quantity of modern communication. The number of neurons (node number) in the neural networks in human brain is not the unit of the memory capacity of the human being. The complexity of neural network is much greater than the bit capacity. Hence, the current AI, which tries to imitate the human brain using computing with the basis on bits, performs inherently different processing of information from the human brain. In addition, computing based on bit number is always facing the limitation of integration. The present disclosure provides a system of information memory without relying on bits using three-dimensional neural networks. By replacing the electrical connection of non-volatile memory cells, which are distributed in a three-dimensional array, the mechanism of the information processing of the human brain can be imitated.