Silicon Brain Neural Network for Direct Analog Processing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face limitations in integrating memory cells beyond two-dimensional planes, leading to inefficiencies in computational speed and power consumption, particularly in deep learning and machine learning applications, due to the von-Neumann bottleneck and the use of volatile memory, which results in excessive information processing requirements and potential environmental impacts.
Innovation Solution
The integration of a neural network on a silicon chip using periodically distributed islands, select gates, junction transistors, operational amplifiers, and capacitors, allowing for direct information processing without conversion to bit data, mimicking the human brain's neural network structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If memory cells are integrated on a two-dimensional plane using conventional semiconductor architecture, then manufacturing precision and ease of manufacture are maintained, but integration density and computational efficiency deteriorate due to the von-Neumann bottleneck
Solution Approach 1:
The patent transitions from conventional two-dimensional memory cell arrangement to a three-dimensional cross-point architecture where memory cells are positioned at intersections of word lines and bit lines in the vertical dimension. This enables direct analog computation by utilizing the spatial intersection structure to perform matrix multiplication operations, thereby resolving the von-Neumann bottleneck while maintaining manufacturing feasibility through standard semiconductor fabrication processes
Solution Approach 2:
The patent merges the functions of memory storage and computational processing into a single integrated structure. The cross-point memory array simultaneously serves as both memory cells for data storage and as a computational engine for performing neural network operations, eliminating the need for separate memory and processing units that characterize conventional von-Neumann architecture
2Speed
If volatile memory is used in conventional semiconductor devices, then speed of access is improved, but power consumption increases due to continuous refresh requirements
Solution Approach 1:
The patent changes the fundamental operating parameters of memory cells by using resistive memory elements that maintain their state without continuous power supply. The memory cells utilize resistance changes to store information, eliminating the need for periodic refresh operations required by volatile memory, thereby significantly reducing power consumption while maintaining fast access speeds through direct resistive switching
3Reliability
If information is processed by converting to bit data in conventional computers, then reliability of data representation is improved, but computational load and processing time increase due to the von-Neumann bottleneck
Solution Approach 1:
The patent replaces the mechanical sequential processing of bit data conversion and manipulation with direct analog computation. Neural network operations are performed using continuous voltage signals that directly represent weights and inputs, eliminating the need for sequential bit-level processing and conversion operations, thereby dramatically reducing processing time while maintaining computational accuracy through analog-to-digital conversion only at input and output stages
4Quantity of substance
If memory cells are integrated in three-dimensional space, then integration density is improved, but device complexity increases due to additional addressing dimensions
Solution Approach 1:
The patent makes the cross-point structure universal by designing it to simultaneously serve multiple functions: memory storage, computational processing, and weight adjustment. The same physical structure of intersecting word lines and bit lines performs all these functions without requiring separate dedicated components, thereby achieving high integration density without proportionally increasing device complexity
Data Source
AI summary
The unit to count the storage capacity of the current computing is bit. Hence, the number of transistors (cells) which serve as nodes, that is, the bit number is the unit of the current information communication. On the contrary, the human brain is composed of the cranial nerve circuit. Hence, the memory capacity of the human being is not based on the number of cranial nerves (node number). The complication of the circuit is greater than the bit capacity even with the same node number. The modern artificial intelligence, which tries to reproduce the human brain using the computing based on the bit unit, processes information in an inherently different manner from the human brain. Hence, it is inherently wasteful. Furthermore, the computing based on the bit number is always facing the limitation of integration.