Silicon Cap Layers for FinFET Etch Selectivity
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Solution Overview
Problem
Conventional semiconductor manufacturing processes face challenges in achieving sufficient etch selectivity between hardmask and isolation region materials, particularly in small trenches, leading to potential damage to fins during recessing of isolation regions in FinFET devices.
Innovation Solution
The method involves forming cap layers made of amorphous silicon or polycrystalline silicon in place of the hardmasks, allowing for selective recessing of the dielectric layer with respect to these cap layers, thereby improving etch selectivity and protecting the fins during the process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If heavy polymer gases are used to increase etch selectivity of nitride films during oxide etching, then etch selectivity is improved, but the polymers block the isolation region from being recessed, especially in smaller trenches
Solution Approach 1:
The patent introduces an intermediary material (silicon-based cap layer) that replaces the traditional nitride hardmask. This cap layer provides the necessary protection during etching while being removable and not blocking the isolation region recessing process, thus mediating between the need for etch selectivity and the need for isolation region access
Solution Approach 2:
The patent changes the material parameter of the hardmask from nitride to silicon-based material (amorphous or polycrystalline silicon). This material substitution fundamentally alters the etching characteristics, allowing for high etch selectivity without the side effect of polymer blockage, thereby resolving the contradiction between etch selectivity and isolation region recessing
2Object-affected harmful factors
If conventional hardmask materials are used during isolation region recessing, then the hardmask provides protection, but etch selectivity between hardmask and isolation region materials is insufficient, leading to erosion of the hardmask and damage to the fin
Solution Approach 1:
The patent changes the material composition parameter of the hardmask from conventional nitride to silicon-based materials (amorphous or polycrystalline silicon). This parameter change creates superior etch selectivity between the cap layer and oxide isolation region, preventing hardmask erosion and fin damage during the recessing process
Solution Approach 2:
The patent employs composite material strategy by using silicon-based materials that combine the protective function of hardmasks with enhanced etch selectivity characteristics. The silicon-based cap layer provides both protection and selective etching performance that conventional single-material hardmasks cannot achieve
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the ability to recess isolation regions without damaging the hardmask or the fins, ensuring precise control and minimizing fin height variations, even in dual-channel FinFET structures.
Implementation Method 1
selectively recessing the dielectric layer with respect to the plurality of cap layers
Implementation Method 2
forming a plurality of cap layers in place of the removed hardmasks on each of the plurality of fins
Data Source
AI summary
A method for manufacturing a semiconductor device includes patterning a plurality of fins on a semiconductor substrate, wherein a hardmask is formed on each of the plurality of fins, forming a dielectric layer on the semiconductor substrate between the plurality of fins, removing the hardmasks from each of the plurality of fins, forming a plurality of cap layers in place of the removed hardmasks on each of the plurality of fins, wherein the plurality of cap layers comprise at least one of amorphous silicon and polycrystalline silicon, and selectively recessing the dielectric layer with respect to the plurality of cap layers.