Anodic Bonding of Silicon and Ceramic Substrates for Fine Wiring
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Solution Overview
Problem
The increasing demand for miniaturized semiconductor chips poses a challenge for traditional wiring boards, as they struggle to accommodate minute wiring requirements while maintaining cost-effectiveness due to the high manufacturing costs associated with multi-layer structures.
Innovation Solution
A wiring board comprising a ceramic substrate with stacked ceramic layers and internal wiring, anodically bonded to a silicon substrate with a wiring layer, allowing for hyperfine via-holes and wiring patterns, which reduces equipment costs and enables fine structure connectivity without the need for multi-layer silicon substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a multi-layer structure is used to accommodate minute wiring requirements, then wiring precision is improved, but manufacturing cost increases
Solution Approach 1:
The wiring board is divided into two separate substrates: a ceramic substrate for lower-layer wiring and a silicon substrate for upper-layer wiring. This segmentation allows each substrate to be manufactured independently with optimized processes, avoiding the need for complex multi-layer fabrication while achieving fine wiring precision through the high-precision silicon substrate.
Solution Approach 2:
The via holes act as intermediaries to connect the wiring layers between the ceramic and silicon substrates. By using through-holes with conductive fills as connection pathways, the invention achieves multi-layer wiring functionality without requiring a fully integrated multi-layer structure, thereby reducing manufacturing complexity and cost.
2Reliability
If a multi-layer structure is used to achieve fine structure connectivity, then connection reliability is improved, but device complexity increases
Solution Approach 1:
The device is segmented into two functional substrates with distinct roles: the ceramic substrate provides stable lower-layer wiring and the silicon substrate provides precise upper-layer wiring. This segmentation simplifies the overall device structure compared to a fully integrated multi-layer system, while maintaining connection reliability through the robust via-hole connections between layers.
Solution Approach 2:
The invention extracts the multi-layer wiring function and implements it across two separate substrates rather than within a single complex substrate. This extraction approach reduces device complexity by allowing each substrate to be optimized independently, while the via holes provide the necessary inter-layer connectivity for reliable signal transmission.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances connection reliability by matching thermal expansion coefficients, reduces manufacturing costs, and allows for efficient production of interposers that can handle fine semiconductor chip structures at a lower cost, while eliminating the need for underfill resin in semiconductor packages.
Implementation Method 1
the rear surface of the silicon substrate is anodically bonded to the first surface of the ceramic substrate
Data Source
AI summary
A wiring board includes a ceramic substrate including a plurality of stacked ceramic layers, an internal wiring, and an electrode, the internal wiring being electrically connected to the electrode, the electrode being exposed from a first surface of the ceramic substrate; and a silicon substrate including a wiring layer, the wiring layer including a wiring pattern and a via-fill, the wiring pattern being formed on a main surface of the silicon substrate, an end of the via-fill being electrically connected to the wiring pattern, another end of the via-fill being exposed from a rear surface of the silicon substrate positioned opposite to the main surface, wherein the rear surface of the silicon substrate is anodically bonded to the first surface of the ceramic substrate; and the via-fill of the silicon substrate is directly connected to the electrode of the ceramic substrate.