Silicon Germanium Seed Layer for Non-Volatile Memory
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Solution Overview
Problem
Conventional resistive switching devices require high voltages for operation, have poor endurance characteristics, and cannot be scaled to nanometer sizes due to defects at the interface between amorphous silicon switching material and metal electrodes, limiting their applicability in modern electronics.
Innovation Solution
A method and structure are developed to form a low-temperature crystalline silicon germanium material with a p+ impurity characteristic, used as a junction layer between electrodes, which reduces interfacial defects and enables efficient resistive switching with a silicon germanium material deposited at temperatures between 400°C to 490°C, facilitating the integration of resistive switching devices into non-volatile memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon switching material is used at the interface with metal electrodes, then device fabrication is simplified, but interfacial defects increase leading to poor reliability
Solution Approach 1:
A crystalline silicon germanium layer is introduced as an intermediary between the amorphous silicon switching material and metal electrodes. This intermediate layer serves as a buffer that reduces interfacial defects while maintaining the fabrication simplicity of using amorphous silicon, thereby resolving the contradiction between ease of manufacture and reliability.
2Manufacturing precision
If conventional high-temperature processes are used to form crystalline silicon, then material quality improves, but thermal budget compatibility with CMOS processes deteriorates
Solution Approach 1:
The deposition temperature parameter is changed from conventional high temperatures to a reduced range of 400°C to 490°C. This parameter change enables the formation of high-quality crystalline silicon germanium material while maintaining compatibility with the thermal budget of CMOS back-end processes, resolving the contradiction between manufacturing precision and temperature constraints.
3Productivity
If device size is reduced to nanometer scale, then integration density improves, but interfacial defects become more prominent causing operation failures
Solution Approach 1:
The crystalline silicon germanium layer provides locally improved quality at the critical electrode interfaces. By enhancing the local crystalline structure and reducing interfacial defects at specific locations, the device can be scaled to nanometer dimensions with improved integration density while maintaining operational reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the fabrication of low-power, non-volatile memory devices with improved reliability and scalability, compatible with CMOS processes, enabling their integration into various electronic devices such as computers and portable phones.
Implementation Method 1
depositing a silicon germanium material at a depositing temperature raging from about 400 Degree Celsius to about 490 Degree Celsius overlying the first wiring structure using the silicon material as a seed layer. The silicon germanium material is substantially free of voids and has a crystalline characteristic
Data Source
AI summary
A method of forming a non-volatile memory device includes providing a substrate having a surface, depositing a dielectric overlying the surface, forming a first wiring structure overlying the dielectric, depositing silicon material overlying the first wiring structure, the silicon layer having a thickness of less than about 100 Angstroms, depositing silicon germanium material at a temperature raging from about 400 to about 490 Degrees Celsius overlying the first wiring structure using the silicon layer as a seed layer, wherein the silicon germanium material is substantially free of voids and has polycrystalline characteristics, depositing resistive switching material (e.g. amorphous silicon material) overlying the silicon germanium material, depositing a conductive material overlying the resistive material, and forming a second wiring structure overlying the conductive material.