Silicon-Oxide Display Layer Interconnect for Low Contact Resistance
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Solution Overview
Problem
There is an undesirably large contact resistance between the conductor regions of silicon semiconductor and oxide semiconductor layers when electrically connected, which affects the performance of display devices.
Innovation Solution
A display device structure is implemented with a crystalline silicon semiconductor layer and an oxide semiconductor layer, where a first contact hole in the gate and interlayer insulating films electrically connects the conductor regions through a lower wire, reducing direct contact and thereby minimizing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the conductor region of the silicon semiconductor layer and the conductor region of the oxide semiconductor layer are electrically connected together, then the electrical connection between the two semiconductor layers is established, but the contact resistance between the conductor regions becomes undesirably large
Solution Approach 1:
The patent introduces a lower wire as an intermediary conductor that mediates the electrical connection between the first conductor region (silicon semiconductor) and the second conductor region (oxide semiconductor). This lower wire is positioned in a lower metal layer and makes contact with both conductor regions, thereby establishing the electrical connection while avoiding the high contact resistance that would occur with direct contact between the two semiconductor layers.
2Device complexity
If a direct contact structure is used to connect the conductor regions, then the device structure is simpler, but the contact resistance increases and performance deteriorates
Solution Approach 1:
The patent resolves the contradiction by transitioning from a two-dimensional direct contact interface to a three-dimensional multi-layer connection structure. The lower wire is embedded in a lower metal layer that is positioned beneath the semiconductor layers, creating a vertical stacking arrangement. This dimensional change allows the conductor regions to be connected through the lower metal layer without requiring direct lateral contact, thereby reducing contact resistance while maintaining manageable device complexity.
Data Source
AI summary
A crystalline silicon semiconductor layer includes a first channel region and a second conductor region. An oxide semiconductor layer includes a second channel region and a second conductor region. An lower metal layer includes a lower wire. The lower wire is in contact with a first conductor region in a first contact hole. The first conductor region and the second conductor region are electrically connected together through the lower wire.