Silicon Substrate Polishing Slurry Control for Lower PID

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Solution Overview

Problem

As semiconductor design rules become finer, silicon substrates require higher-quality finishes to reduce micro defects induced by polishing processes, known as Polishing Induced Defects (PID), which are typically formed during the final polishing step using less abrasive slurries, and conventional stock polishing steps are believed to have little impact on these defects.

Innovation Solution

A method for polishing silicon substrates that includes a stock polishing step with multiple sub-steps on the same platen, using a final stock polishing slurry with limited Cu and Ni content to reduce PID, and a final polishing step with a different slurry composition to achieve a high-quality finish, effectively canceling bumps from hard laser marks and minimizing surface roughness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a final polishing step using less abrasive slurry is performed to achieve high-quality finish, then surface smoothness is improved, but Polishing Induced Defects (PID) increase

Engineering Contradiction:
Improvesurface smoothnessVSAvoidPolishing Induced Defects
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by performing a stock polishing step before the final polishing step. This stock polishing step uses a polishing slurry containing Cu and Ni to remove surface irregularities and prevent defect formation during the subsequent final polishing step. The preliminary removal of surface imperfections through stock polishing with specific metal content prevents PID formation while maintaining the ability to achieve high surface smoothness in the final step.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies parameter changes by controlling the concentration of Cu and Ni in the polishing slurry during the stock polishing step. By optimizing the metal content parameters in the slurry composition and adjusting polishing conditions, the process achieves both defect prevention and high surface quality without requiring excessive final polishing that would generate PID.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If stock polishing step uses more abrasive slurry to efficiently reduce surface roughness, then productivity is improved, but impact on reducing PID after final polishing is limited

Engineering Contradiction:
Improvesurface roughness reduction efficiencyVSAvoidPID reduction
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by optimizing the Cu and Ni content in the polishing slurry used during the stock polishing step. By controlling these chemical parameters within specific ranges, the process achieves both efficient surface roughness reduction and effective PID prevention, resolving the contradiction between productivity and manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies composite materials by using a polishing slurry that contains a combination of abrasives along with Cu and Ni metals. This composite slurry formulation enables the stock polishing step to simultaneously perform mechanical removal of surface irregularities and chemical modification to prevent defect formation, achieving both high productivity and PID reduction.

Inventive Principle:
Principle #40Composite materials

3Manufacturing precision

If multiple stock polishing sub-steps are performed on the same platen to reduce PID, then process complexity increases, but surface quality improves

Engineering Contradiction:
Improvesurface qualityVSAvoidpolishing process steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the stock polishing step into multiple sub-steps, each with optimized slurry composition and processing parameters. This segmentation allows progressive refinement of the surface, with each sub-step targeting specific aspects of surface quality and defect prevention, ultimately achieving superior results while managing process complexity through systematic breakdown.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies universality by performing multiple stock polishing sub-steps on the same platen rather than requiring different equipment for each step. The single platen is used repeatedly with different slurry compositions, combining the functions of multiple polishing operations into one versatile setup, thereby improving surface quality without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method significantly reduces Polishing Induced Defects (PID) and achieves a higher-quality finish by effectively canceling bumps and improving surface smoothness, while maintaining productivity and cost-effectiveness.

Implementation Method 1

The stock polishing step includes several stock polishing sub-steps that are carried out on one same platen. The several stock polishing sub-steps include a final stock polishing sub-step that is carried out with supplying a final stock polishing slurry PF to the silicon substrate.

Methodology Applied
Scientific EffectAbrasion: Abrasion

Data Source

PatentEP3425658B1Method for polishing silicon substrate
Publication Date: 2024.04.03 FUJIMI INCORPORATED

AI summary

Provided are a method for polishing a silicon substrate according to which PID can be reduced and a polishing composition set usable in the polishing method. The silicon substrate polishing method provided by this invention comprises a stock polishing step and a final polishing step. The stock polishing step comprises several stock polishing sub-steps carried out on one same platen. The several stock polishing sub-steps comprise a final stock polishing sub-step carried out while supplying a final stock polishing slurry PF to the silicon substrate. The total amount of the final stock polishing slurry PF supplied to the silicon substrate during the final stock polishing sub-step has a total weight of Cu and a total weight of Ni, at least one of which being 1 µg or less.