Dual-Sided Silicon Stack Interfaces for Power-Data Routing
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Solution Overview
Problem
Existing silicon stacks face challenges in efficiently routing power and data signals due to limited real estate and increased bandwidth and power requirements, leading to suboptimal routing and interference, which limits the performance and size of electronic devices.
Innovation Solution
Implementing electrical connections on both sides of the silicon stack, utilizing through-silicon vias (TSVs) and through-mold vias (TMVs) to separate power and data signals, reducing capacitive and inductive coupling, and optimizing power delivery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all electrical connections are placed on one side of the silicon stack, then the device structure is simplified, but the real estate for routing and electrical connections is limited, leading to suboptimal routing for data signal interfaces and power delivery
Solution Approach 1:
The patent transitions from a single-sided electrical connection interface to a dual-sided interface, utilizing both the top and bottom surfaces of the silicon stack for electrical connections. This dimensional change from 2D single-sided to 3D dual-sided routing provides additional real estate for power and data signal connections, resolving the contradiction between structural simplicity and available routing area.
2Productivity
If the number of channels and data bus width are increased to improve bandwidth, then signal bandwidth increases, but the pressure on stack interface resources (bumps and signal routing) increases
Solution Approach 1:
By implementing electrical connections on both sides of the silicon stack, the patent effectively doubles the available interface resources for bumps and signal routing. This allows increased number of channels and wider data buses to be supported without overwhelming the interface resources, as the dual-sided configuration distributes the routing load across both surfaces.
3Power
If power requirements are increased to meet higher processing power and signal bandwidth demands, then processing capability improves, but the routing for power delivery becomes suboptimal
Solution Approach 1:
The dual-sided electrical connection interface allows power delivery networks to be distributed across both top and bottom surfaces of the silicon stack. This enables shorter power paths, reduced current density, and more efficient power distribution to support higher processing power requirements without creating suboptimal routing conditions.
4Ease of manufacture
If electrical connections are concentrated on one side, then manufacturing is simpler, but capacitive and inductive coupling between power and data signals increases
Solution Approach 1:
The patent segments the electrical connections by separating power signals and data signals onto different sides of the silicon stack. Power connections are placed on one side while data signal connections are placed on the opposite side, physically separating these signal types to reduce capacitive and inductive coupling between them, while still maintaining manufacturing feasibility through the standardized dual-sided interface approach.
Data Source
AI summary
An electronic device, a chip package, and a system comprising the same are disclosed herein. In one example, an electronic device includes a silicon stack. The silicon stack has first side having first electrical connections configured to receive power from a power source, and a second side positioned opposite the first side configured to communicate a first data signal.