Silicon Substrate Semiconductor Apparatus Downsizing
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in downsizing due to limitations in micromachining ceramic materials and the high cost and variability of forming deep concave portions in silicon substrates, which affect the yield and productivity of semiconductor apparatuses.
Innovation Solution
A semiconductor apparatus is designed with a silicon substrate featuring a concave portion and a hole through its bottom surface, sealed by laminated semiconductor devices and lids, using anodic bonding to create a clean, compact housing space with via plugs for electrical connections, allowing for efficient downsizing and improved micromachining accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ceramic material is used for cavity and substrate, then packaging stability is improved, but micromachining difficulty increases and device size cannot be reduced
Solution Approach 1:
The patent changes the material parameter from ceramic to silicon, which fundamentally alters the micromachining characteristics. Silicon allows for precise deep hole formation and complex 3D structures through standard semiconductor fabrication processes, resolving the micromachining difficulty while maintaining packaging stability through the rigid silicon substrate and cavity structure.
Solution Approach 2:
The patent employs a composite structure combining silicon substrate with metal lids (kovar or stainless steel) and ceramic-like properties through the silicon dioxide insulation layer. This composite approach achieves both the micromachinability of silicon and the packaging stability traditionally provided by ceramic materials.
2Volume of stationary object
If deep concave portion is formed in silicon substrate, then device housing space is improved, but manufacturing cost increases and yield decreases
Solution Approach 1:
The patent performs preliminary actions by forming the deep hole and concave portion using standard semiconductor fabrication processes before final assembly. The hole is etched through the substrate, insulation layers are deposited, and via plugs are formed in advance, allowing for precise control and high yield in mass production while achieving adequate device housing space.
3Volume of stationary object
If deep concave portion is formed in silicon substrate, then device housing space is improved, but shape variation increases
Solution Approach 1:
The patent replaces mechanical machining methods with photo lithography and chemical etching processes. These semiconductor fabrication techniques provide superior precision and uniformity in forming deep holes and concave portions, minimizing shape variation in depth and angle while achieving adequate device housing space through controlled material removal.
4Reliability
If ceramic material is used, then packaging stability is improved, but device size cannot be reduced
Solution Approach 1:
The patent changes the material parameter from ceramic to silicon, enabling miniaturization through precise micromachining. The silicon substrate allows for smaller, more integrated structures with well-defined geometries, reducing overall device size while maintaining packaging stability through the rigid silicon structure and sealed cavity design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the downsizing of semiconductor apparatuses while maintaining high precision and reducing manufacturing costs by utilizing silicon substrates effectively, improving heat transfer, and minimizing shape variation, thus enhancing productivity and device stability.
Implementation Method 1
sealed by laminated semiconductor devices and lids, using anodic bonding to create a clean, compact housing space
Implementation Method 2
improving heat transfer
Data Source
Figure 1~2
Figure 3A~3B
Figure 3C~3D
AI summary
A semiconductor apparatus comprising a silicon substrate (101); a device housing space (104) including a concave portion (101C) formed in the silicon substrate (101) and a hole (101A) perforating through the bottom surface of the concave portion; a plurality of laminated semiconductor devices provided in the device housing space; a first lid (108) which lids the concave portion and a second lid (107; 107A) which lids the hole, for sealing the semiconductor devices; and via plugs (105) which are connected to any one of the semiconductor devices, penetrating the bottom surface of the concave portion.