SIMD Multi-Literal Matching for Faster Large-Scale Processing

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Solution Overview

Problem

Existing multi-literal matching algorithms, such as the Aho-Corasick (AC) and FDR algorithms, suffer from performance bottlenecks due to byte-by-byte or 8-byte chunk operations, which slow down data processing and verification of matching candidates in large-scale applications like network I/O, network intelligence, intrusion detection, and deep packet inspection.

Innovation Solution

The HARRY algorithm utilizes SIMD instructions to process larger chunks of input data in parallel, leveraging a simplified SHIFT-OR mask table and AVX-512 VPERMB instructions to perform table lookups for 64 bytes at a time, reducing the need for byte-by-byte operations and minimizing false positives.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If byte-by-byte or 8-byte chunk operations are used in multi-literal matching algorithms, then matching accuracy is maintained, but data processing speed deteriorates

Engineering Contradiction:
Improvedata processing speedVSAvoidprocessing time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent divides the input data stream into variable-size chunks (e.g., 64-byte chunks) rather than processing byte-by-byte or fixed 8-byte chunks. This segmentation allows the algorithm to process multiple bytes in parallel using SIMD instructions, thereby improving data processing speed while maintaining matching accuracy through systematic verification of candidates.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces traditional sequential mechanical processing (byte-by-byte operations) with SIMD (Single Instruction Multiple Data) parallel processing. By using vectorized instructions to perform table lookups and SHIFT-OR operations on multiple bytes simultaneously, the algorithm achieves significant speedup while maintaining the logical structure of the matching process.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If larger data chunks are processed in parallel using SIMD instructions, then data processing speed is improved, but algorithm complexity increases

Engineering Contradiction:
Improvedata processing throughputVSAvoidalgorithm complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent creates a universal algorithm framework that can handle variable-size chunks (e.g., 64 bytes) and adapt to different SIMD instruction sets. The core logic remains the same regardless of chunk size, allowing the algorithm to maintain high productivity while managing complexity through a unified approach that can be configured for different performance requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes key parameters of the algorithm including chunk size (from 8 bytes to 64 bytes), table lookup dimensions, and SIMD vector width. These parameter changes enable the algorithm to optimize for parallel processing while maintaining a systematic structure that manages complexity through configurable parameters rather than fundamentally different algorithms.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If traditional SHIFT-OR operations are performed for every 8-byte chunk, then matching verification is thorough, but processing time increases

Engineering Contradiction:
Improvematching verification accuracyVSAvoidverification time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary table lookups for all bytes in a chunk simultaneously using SIMD instructions before performing the SHIFT-OR verification. This preliminary action pre-computes the mask values needed for verification, allowing the subsequent verification step to proceed more efficiently while maintaining thoroughness in checking all possible match candidates.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges multiple operations into a single SIMD instruction execution. Instead of performing separate table lookup and SHIFT-OR operations for each 8-byte chunk sequentially, the algorithm combines these operations to process larger chunks (e.g., 64 bytes) in parallel, thereby reducing total verification time while maintaining reliability through systematic candidate verification.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12436762B2Techniques for use of a large scale multi-literal matching algorithm
Publication Date: 2025.10.07 INTEL CORP
  • US12436762B2 patent drawing
  • US12436762B2 patent drawing
  • US12436762B2 patent drawing

AI summary

Examples include techniques four use of a large scale multi-literal matching algorithm. Implementation of the large scale multi-literal matching algorithm includes processing a chunk of input data via performance of a SHIFT-OR operation using the chunk of input data to identify a match candidate for a target literal character pattern. A single input multiple data (SIMD) instruction may be utilized by a processor to perform the SHIFT-OR operation as a parallel table lookup of rows of SHIFT-OR mask table for the chunk of input data to facilitate identification of the match candidate.