Simultaneous Islanding and Line Feature Patterning

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Solution Overview

Problem

Current semiconductor manufacturing techniques face challenges in forming fine and miniaturized structures efficiently, particularly with the increasing demands of advanced memory devices, as they require longer process durations and limited throughput due to sequential formation of islanding and line structures.

Innovation Solution

A method integrating pitch doubling and double patterning processes to simultaneously form sophisticated islanding features and slim line features, reducing process duration by forming these features simultaneously in different regions of the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If sequential formation of islanding and line structures is used, then manufacturing simplicity is maintained, but process duration increases and throughput decreases

Engineering Contradiction:
ImprovethroughputVSAvoidpatterning process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines the formation of islanding features and line features into a single integrated patterning process. By forming both feature types simultaneously in different regions of the substrate using the same mask structure and patterning steps, the method eliminates the need for separate sequential processes, thereby increasing throughput while maintaining controlled complexity through process integration.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The substrate is divided into different regions (first region for islanding features, second region for line features) that are processed simultaneously. This segmentation allows different feature types to be formed in parallel within the same process flow, improving productivity without requiring entirely separate process sequences for each feature type.

Inventive Principle:
Principle #1Segmentation

2Duration of action of moving object

If separate processes are used for islanding and line features, then process simplicity is maintained, but process duration increases

Engineering Contradiction:
Improveprocess durationVSAvoidpatterning process complexity
Core Design Contradiction:
Duration of action of moving objectVSDevice complexity

Solution Approach 1:

The patent merges the patterning processes for islanding features and line features into a single unified process sequence. Both feature types are formed using the same mask structure formation, pattern transfer, and etching steps performed simultaneously in different substrate regions, thereby reducing total process duration while managing complexity through standardization of the shared process steps.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If simultaneous formation of islanding and line features is implemented, then productivity is improved, but device complexity increases

Engineering Contradiction:
ImprovethroughputVSAvoidpatterning process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies local quality by defining different regions of the substrate with different desired feature types (islanding features in the first region, line features in the second region). The single integrated patterning process is configured to produce different feature geometries in different locations, allowing simultaneous formation of diverse features while managing overall process complexity through regional specialization.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10553433B2Method for preparing a semiconductor structure
Publication Date: 2020.02.04 NAN YA TECH
  • US10553433B2 patent drawing
  • US10553433B2 patent drawing
  • US10553433B2 patent drawing

AI summary

A method for preparing a semiconductor structure includes the following steps: providing a substrate including a first region and a second region defined thereon, forming a first mask structure over the substrate, forming a plurality of first features in the first mask structure in the first region, forming a second mask structure over the first mask structure, simultaneously forming a plurality of second features in the second mask structure in the second region and a plurality of third features in the second mask structure in the first region, and transferring the second features and the third features to the first mask structure to simultaneously form a plurality of islanding features in the first region and a plurality of line features in the second region.