Single-Clock Frequency Tracking Circuit for Stable Phase Recovery
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Solution Overview
Problem
Existing frequency tracking circuits in Ethernet optical fiber networks require two sets of clock signals with a 90-degree phase difference, leading to complex designs, increased circuit area, and power consumption, as well as instability due to interference with phase tracking.
Innovation Solution
A frequency tracking circuit that uses a single feedback clock signal, incorporating an edge selector, phase-frequency processor, and digital controlled oscillator, which adjusts the frequency based on differential phase differences, allowing for simplified oscillator design and reduced interference with phase tracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If two sets of clock signals with 90-degree phase difference are used for frequency tracking, then frequency detection capability is improved, but device complexity and circuit area increase
Solution Approach 1:
The patent makes the feedback clock signal serve dual purposes: it is used for both phase tracking and frequency tracking operations. By utilizing the same clock signal for both functions rather than requiring separate clock signals, the patent eliminates the need for complex multi-oscillator designs while maintaining the capability to perform both phase and frequency detection operations
Solution Approach 2:
The patent extracts only the essential frequency detection capability from the traditional quadrature sampling approach. Instead of requiring two orthogonal clock signals, the invention uses a single clock signal with edge selection and phase difference accumulation to achieve frequency detection, thereby removing the unnecessary complexity of dual-oscillator design
2Measurement precision
If two sets of clock signals are used for frequency tracking, then frequency detection is improved, but circuit area increases
Solution Approach 1:
The feedback clock signal is designed to perform multiple functions simultaneously - it serves as the reference for phase tracking and as the basis for frequency tracking. This multi-functional approach eliminates the need for separate oscillator circuits, thereby reducing the overall circuit area occupied by frequency tracking components
Solution Approach 2:
The patent merges the frequency tracking function with the existing phase tracking infrastructure by using the same feedback clock signal for both operations. The edge selector and phase difference accumulator are integrated into the existing CDR architecture, combining multiple functions into a unified circuit design that occupies less area
3Measurement precision
If frequency tracking is performed using prior art methods, then frequency difference detection is achieved, but phase tracking stability deteriorates due to interference
Solution Approach 1:
The patent segments the frequency tracking operation into distinct phases using the edge selector - identifying either data edges or clock edges based on phase relationship. This segmentation allows frequency detection to occur without continuously interfering with the phase tracking loop, as the system selectively processes edges based on current phase conditions
Solution Approach 2:
The patent implements a feedback mechanism where the accumulated phase difference is used to control the DCO frequency adjustment. This feedback loop ensures that frequency tracking corrections are applied smoothly and do not cause abrupt changes that would destabilize the phase tracking, maintaining system stability while achieving accurate frequency detection
Data Source
AI summary
A frequency tracking circuit is disclosed. The frequency tracking circuit includes an edge selector, a phase-frequency processor and a digital controlled oscillator. The edge selector receives a data signal and feedback clock signal and sequentially outputs a data edge signal and a feedback-clock-edge signal. The phase-frequency processor receives the data edge signal and the feedback-clock-edge signal and outputs a frequency adjusting digital signal after executing differential operation according to a first phase difference and a second phase difference. The digital controlled oscillator receives the frequency adjusting digital signal so as to adjust frequency of the feedback clock signal. The phase-frequency processor outputs a frequency tracking signal to the edge selector, wherein the edge selector utilizes the frequency tracking signal for acquiring the data edge signal and utilizes the data edge signal for acquiring the feedback-clock-edge signal.