Stacked Die Circuit Routing for Single-Mask 3D IC Layouts
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Solution Overview
Problem
In 3D IC packaging, moving timing-constrained circuits to other dies can cause design differences, leading to increased fabrication costs due to the need for different masks for each die, even if they have identical designs otherwise.
Innovation Solution
A stacked die system where a signal passes through either a first circuit of the first die or a second circuit of the second die, but not both, allowing for shared area usage and fabrication with a single mask for dies with the same design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If voltage regulation circuits are moved to a die that is mostly vias, then area is saved on timing-constrained dies, but fabrication cost increases due to requiring different masks for dies with different designs
Solution Approach 1:
The patent applies universality by ensuring that all dies in the package, including those primarily consisting of vias, contain the complete circuit design. This allows a single mask set to be used for fabricating all dies, achieving economies of scale in manufacturing while still enabling area optimization through strategic placement of circuit functionality across different dies in the 3D stack.
2Area of moving object
If circuits are moved between dies in a 3D package, then area allocation can be optimized, but design uniformity across dies is lost
Solution Approach 1:
The patent applies segmentation by dividing the complete circuit design into multiple identical instances that can be distributed across different dies in the 3D package. Each die receives a full copy of the circuit design, allowing area optimization through selective activation or deactivation of certain circuit instances while maintaining design uniformity across all fabricated dies.
Data Source
AI summary
A stacked die system includes at least three dies. A first die has a same design as a second die. The first die includes a first circuit, and the second die includes a corresponding second circuit. A signal is received at the first die and sent to the third die via the second die. The signal is routed through either the first circuit or the second circuit but not both. Accordingly, an operation is performed on the signal prior to the signal reaching the third die but the operation is not performed by both the first circuit and the second circuit.


