Single-Phase Error Sampler for FIR, DFE, and CDR Adaptation

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Solution Overview

Problem

High-speed data communication systems face challenges in efficiently adapting equalization values for FIR, DFE, and CDR parameters due to increased circuitry and power consumption from current sampling techniques, which are not protocol-specific and interact complexly with each other.

Innovation Solution

A data communications system that samples the data signal at a phase corresponding to the peak amplitude of the channel's pulse response within a single clock cycle to adapt pre-cursor and post-cursor tap coefficients of the FIR and the DFE, using a single-phase error sampler to determine an error signal for efficient equalization and clock recovery.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If edge-based sampling is used for CDR adaptation, then clock recovery performance is improved, but circuit complexity and power consumption increase

Engineering Contradiction:
Improveclock recovery performanceVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines edge-based sampling and mid-symbol sampling into a unified single-phase error sampler that performs both functions simultaneously. The error sampler uses the recovered clock to generate both edge-based error signals (for CDR adaptation) and mid-symbol error signals (for DFE and FIR adaptation) without requiring separate sampling circuits, thereby reducing circuit complexity while maintaining clock recovery performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single-phase error sampler is designed to serve multiple functions: it performs CDR adaptation through edge-based sampling, DFE adaptation through mid-symbol sampling, and FIR adaptation through the same error signal. This multi-functional approach eliminates the need for separate error monitor circuits for each adaptation type, reducing overall circuit complexity and power consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If both mid-symbol and edge-based sampling are used for error monitoring, then equalization and CDR adaptation are improved, but power consumption increases

Engineering Contradiction:
Improveequalization and CDR adaptationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent merges mid-symbol sampling and edge-based sampling into a single phase sampling operation. The error sampler generates a single error signal that is then used by both the DFE/FIR adaptation logic and the CDR adaptation logic, eliminating the need for two separate sampling operations and their associated power consumption.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single-phase error sampler automatically generates the appropriate error signals for both equalization and clock recovery without requiring external control signals or additional sampling operations. The error signal is inherently suitable for both adaptation types, allowing the system to serve multiple purposes from a single sampling operation.

Inventive Principle:
Principle #25Self-service

3Ease of operation

If protocol-specific adaptation patterns are used, then CDR and DFE tuning are achieved, but adaptability to different protocols is reduced

Engineering Contradiction:
ImproveCDR and DFE tuningVSAvoidprotocol compatibility
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The adaptation system operates autonomously using the actual data stream without requiring external training patterns or protocol-specific sequences. The error sampler continuously monitors the data stream and generates error signals that drive adaptation of the CDR, DFE, and FIR parameters in real-time, making the system adaptable to any protocol without requiring protocol-specific tuning patterns.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system dynamically adjusts the sampling phase and error signal generation based on the characteristics of the incoming data stream rather than relying on fixed protocol-specific patterns. This allows the adaptation mechanism to work effectively across different protocols by adapting to the actual signal characteristics present in the data stream.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8229020B2Integrated equalization and CDR adaptation engine with single error monitor circuit
Publication Date: 2012.07.24 ORACLE AMERICAN INC
  • US8229020B2 patent drawing
  • US8229020B2 patent drawing
  • US8229020B2 patent drawing

AI summary

A data communications system and methods are disclosed. The system includes a transmitter for conveying a data signal filtered by a finite impulse response (FIR) filter to a receiver via a channel. The receiver equalizes the received data signal using a decision feedback equalizer (DFE) and the FIR. The receiver samples the data signal to determine an error signal and uses the error signal to adapt settings of a pre-cursor tap coefficient of the FIR, one or more post-cursor tap coefficients of the FIR, a phase of the recovered clock, and a coefficient of the DFE. To adapt the settings, the receiver determines the error signal based on an error sample taken from the data signal in a single clock cycle. To determine an error signal, the receiver samples the data signal at a phase estimated to correspond to a peak amplitude of a pulse response of the channel.