Single Pin Test Interface for Pin-Limited ICs
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Solution Overview
Problem
In pin-limited or cost-limited chip packages, using a single pin for both test input and output complicates direction switching in serial communication channels, significantly increasing testing time, especially in production tests, thereby raising costs.
Innovation Solution
Configuring an integrated circuit into automatic mode using a single test terminal, where the supply voltage is toggled between two levels to automatically increment or decrement address information, allowing continuous test location access without switching the terminal direction from input to output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single pin is used for both test input and output in pin-limited chip packages, then the number of pins is reduced, but the testing time increases significantly due to complicated direction switching
Solution Approach 1:
The patent maintains the test terminal continuously in receive mode throughout the testing process. Test information is supplied serially to the test terminal, and the supply voltage toggling provides clocking function, eliminating the need to switch the terminal between transmit and receive modes. This continuous receive operation removes direction switching delays and significantly reduces testing time.
Solution Approach 2:
The single test terminal performs multiple functions: it receives test information, receives address information, and outputs test results, all while maintaining receive mode. The supply voltage terminal serves dual purpose as both power supply and clock signal source through voltage toggling. This multi-functionality eliminates the need for separate transmit and receive terminals.
2Adaptability or versatility
If direction switching is implemented on the serial communication channel, then bidirectional communication is achieved, but the control complexity increases
Solution Approach 1:
Instead of switching the test terminal between transmit and receive modes to achieve bidirectional communication, the patent inverts the approach by keeping the test terminal permanently in receive mode. The supply voltage toggling between first and second levels provides the clock signal that enables bidirectional data flow, effectively separating the communication direction control from the terminal mode switching.
3Ease of operation
If serial writes are performed to change test locations, then test information can be updated, but the testing process becomes slower
Solution Approach 1:
The supply voltage is toggled periodically between first and second levels, with each toggling cycle providing a clock signal that advances the address information. This periodic voltage toggling enables continuous sequential access to test locations without requiring time-consuming serial writes, significantly improving throughput while maintaining ease of operation.
Data Source
AI summary
An integrated circuit includes a supply terminal to receive a supply voltage and a test terminal that operates in an input mode and an output mode. A test interface of the integrated circuit operates in a normal mode requiring a serial write to the test terminal to access test locations in the integrated circuit. The test interface also operates in an automatic mode in which addresses for test locations are auto incremented by toggling the supply voltage from a high voltage level to a low voltage level and back to the high voltage level. In an input mode, with the supply voltage at the low voltage level, the test pin receives configuration and address information. In output mode, with the supply voltage at the high voltage level, the test pin supplies test information corresponding to the address information received.