Single Poly MTP Cell Design for High-Density Storage
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Solution Overview
Problem
Conventional Multi Time Programmable (MTP) cells using the Fowler-Nordheim tunneling method face issues with over-erase, large size due to high-voltage requirements, and increased cell area, making it difficult to achieve high-density storage in a small physical space.
Innovation Solution
A single poly MTP cell design that eliminates the selection transistor by using a sensing transistor and control gate, operating at lower voltages through Hot Injection and Band to Band Tunneling methods, and employing pulse voltages to monitor current for precise program and erase operations, reducing the need for high-voltage wells and insulation regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the Fowler-Nordheim tunneling method is used for MTP cell operations, then program and erase operations can be performed, but over-erase occurs resulting in large leakage current
Solution Approach 1:
The patent extracts and removes the selection transistor from the MTP cell structure, keeping only the sensing transistor. This simplification eliminates the over-erase issue that occurred in conventional designs while maintaining reliable program and erase operations through controlled electron injection and removal from the floating gate.
Solution Approach 2:
The patent changes the operational parameters by using controlled voltage applications to the control gate and drain electrode, enabling precise regulation of electron tunneling into and out of the floating gate. This parameter control prevents over-erase by stopping the erase operation before excessive electron removal occurs, thereby reducing leakage current.
2Reliability
If high voltage is used for generating tunneling in operation, then program and erase operations can be performed, but the element size increases due to high-voltage wells and insulation gaps
Solution Approach 1:
The patent merges the sensing transistor and control gate structures to share common regions and reduce overall cell area. The control gate is positioned to efficiently couple with the floating gate without requiring separate high-voltage well structures, thereby reducing the insulating gap requirements and overall cell footprint.
Solution Approach 2:
The patent optimizes the spatial arrangement of components by positioning the control gate electrode and sensing transistor in a compact configuration that reduces the horizontal spread of the cell. The drain electrode is positioned adjacent to the sensing transistor drain region, minimizing the required insulation gaps and high-voltage well extensions.
3Reliability
If a selection transistor is added to prevent over-erase, then over-erase is prevented, but the cell area increases
Solution Approach 1:
The patent extracts and eliminates the selection transistor from the MTP cell design. Instead of adding a selection transistor to prevent over-erase, the invention uses a simplified structure with only the sensing transistor and control gate, preventing over-erase through controlled voltage application and monitoring of tunneling current.
Solution Approach 2:
The sensing transistor serves dual functions: it enables read operations and provides over-erase prevention through its current characteristics. By monitoring the drain current during erase operations, the system can detect when the floating gate is sufficiently depleted and stop further erase, eliminating the need for a separate selection transistor.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the size of the MTP cell, prevents over-erase, and enables efficient program and erase operations at lower voltages, facilitating higher density storage without the need for a selection transistor, thus addressing the challenges of conventional MTP cells.
Implementation Method 1
operating at lower voltages through Hot Injection and Band to Band Tunneling methods
Implementation Method 2
operating at lower voltages through Hot Injection and Band to Band Tunneling methods
Data Source
AI summary
A single poly multi time program (MTP) cell includes a second conductivity-type well, a sensing transistor comprising a drain, a sensing gate, and a source, a drain electrode connected to the drain, a source electrode connected to the source; a control gate connected to the sensing gate of the sensing transistor, and a control gate electrode, wherein the sensing transistor, the drain electrode, the source electrode, the control gate, and the control gate electrode are located on the second conductivity-type well.