Single-Port SRAM with Negative Voltage Write Buffer

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Solution Overview

Problem

Conventional SRAM devices experience decreased read and write margins due to low supply voltage conditions and increased layout area requirements, especially as technology advances and device sizes shrink, leading to device mismatches and process variations.

Innovation Solution

A single-port SRAM device design that eliminates the conventional supply voltage switch and logic control circuit by using a bit-line and inverse bit-line configuration with a write buffer generating a negative voltage, allowing for improved read and write margins through adjusted voltage potentials and reduced layout area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a column-based dynamic power supply is used to provide various supply voltage levels for read and write operations, then the read and write margins can be improved, but the device complexity and layout area increase due to requiring transistor switches and logic control circuits

Engineering Contradiction:

Improveread and write marginsVSAvoiddevice complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the column-based dynamic power supply control circuits (transistor switches and logic control circuits) from the SRAM device. By eliminating these extra circuits, the invention reduces device complexity and layout area while maintaining the ability to perform read and write operations through a simplified single-port interface with fixed supply voltage.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The invention enables the SRAM device to self-service by using a single-port interface with fixed supply voltage connections. The device internally manages its read and write operations without requiring external column-based dynamic power supply control, thereby eliminating the need for transistor switches and logic control circuits while maintaining operational functionality.

Inventive Principle:

Principle #25Self-service

2Area of moving object

If the SRAM device size is shrunk to reduce chip area, then the cell area decreases, but the read and write margins further decrease due to device mismatches and process variations

Engineering Contradiction:

Improvecell areaVSAvoidread and write margins

Core Design Contradiction:

Area of moving objectVSReliability

Solution Approach 1:

The patent changes the operating parameters of the SRAM device by using a single-port interface with fixed supply voltage connections instead of column-based dynamic voltage switching. This parameter change allows the device to achieve improved read and write margins (read margin >345mV, write margin >100mV) even at scaled-down cell sizes, counteracting the negative effects of device mismatches and process variations that typically worsen with scaling.

Inventive Principle:

Principle #35Parameter changes

3Ease of operation

If conventional supply voltage switches and logic control circuits are used for detecting column addresses and controlling power supply switching, then the read and write operations can be controlled, but the overall device size increases

Engineering Contradiction:

Improvecontrol capabilityVSAvoidlayout area

Core Design Contradiction:

Ease of operationVSArea of stationary object

Solution Approach 1:

The patent extracts and removes the conventional supply voltage switches and logic control circuits from the SRAM device. By eliminating these extra circuits used for detecting column addresses and controlling power supply switching, the invention significantly reduces the layout area while maintaining full control capability for read and write operations through a simplified single-port interface.

Inventive Principle:

Principle #2Taking out (Extraction)

4Use of energy by moving object

If the SRAM device operates at low supply voltage conditions to reduce power consumption, then energy efficiency improves, but the read and write margins become too narrow

Engineering Contradiction:

Improvepower consumptionVSAvoidread and write margins

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent changes the voltage parameters by using fixed supply voltage connections instead of dynamic voltage switching. This allows the device to operate with improved read and write margins (read margin >345mV, write margin >100mV) at appropriate supply voltage levels, achieving a balance between power consumption and reliability that avoids the narrow margins associated with low-voltage operation in conventional designs.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS7420835B2Single-port SRAM with improved read and write margins

Publication Date: 2008.09.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

The present invention relates generally to an integrated circuit (IC) design, and more particularly to a method and apparatus for providing an SRAM cell with improved read and write margins. The method includes providing a first negative voltage to a bit-line and a supply voltage to an inverse bit-line to increase a first potential difference between the bit-line and the inverse bit-line during a write operation of a logic “0.” The method also includes providing the first negative voltage to the inverse bit-line and the supply voltage to the bit-line to increase the first potential difference during a write operation of a data “1.”