Single-rail Memory Circuit Row-specific Voltage Boosting
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Solution Overview
Problem
Single-rail memory circuits face increased susceptibility to read fails, particularly sense fails and read stability fails, as cell size is scaled down and supply voltage is lowered, leading to instability in data retrieval.
Innovation Solution
Incorporating row-specific boost circuits that concurrently increase the voltage levels on both the wordline and voltage supply line during read operations, enhancing the read current and reducing the likelihood of read fails without the need for dual-rail power supply levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If cell size is scaled down and supply voltage is lowered, then area consumption and power consumption are reduced, but read stability and sense accuracy deteriorate
Solution Approach 1:
The boost circuit pre-charges the wordline to a voltage higher than the supply voltage (VDD) before the read operation begins. This preliminary voltage boosting ensures that when the access transistors are activated, they receive sufficient gate drive strength to maintain stable read operations even with scaled-down cell sizes and lower supply voltages, thereby preventing read stability fails and sense fails
Solution Approach 2:
The invention dynamically changes the voltage parameter of the wordline from the normal supply voltage (VDD) to a boosted voltage (VDD+) during read operations. This parameter change is achieved through the boost circuit that temporarily elevates the wordline voltage, improving the drive current of access transistors and enhancing read stability without requiring a permanent increase in supply voltage, thus maintaining low power consumption
2Area of moving object
If cell size is scaled down, then area consumption is reduced, but read sense accuracy and stability deteriorate
Solution Approach 1:
The boost circuit pre-charges the wordline to a voltage higher than the supply voltage (VDD) before the read operation begins. This preliminary voltage boosting ensures that when the access transistors are activated, they receive sufficient gate drive strength to maintain stable read operations even with scaled-down cell sizes and lower supply voltages, thereby preventing read stability fails and sense fails
Solution Approach 2:
The invention dynamically changes the voltage parameter of the wordline from the normal supply voltage (VDD) to a boosted voltage (VDD+) during read operations. This parameter change is achieved through the boost circuit that temporarily elevates the wordline voltage, improving the drive current of access transistors and enhancing read stability without requiring a permanent increase in supply voltage, thus maintaining low power consumption
Data Source
AI summary
A single-rail memory circuit includes an array of memory cells arranged in rows and columns and peripheral circuitry connected to the array for facilitating read and write operations with respect to selected memory cells. The peripheral circuitry includes, but is not limited to, boost circuits for the rows. Each boost circuit is connected to a wordline for a row and to a discrete voltage supply line for the same row. Each boost circuit for a row is configured to increase the voltage levels on the wordline and the voltage supply line for the row during a read of any selected memory cell within the row. Increasing the voltage levels on the wordline and on the voltage supply line during the read operation effectively boosts the read current. A method of operating the memory circuit reduces the probability of a read fail.