Single-Slope ADC Delay Compensation Using Segmented References
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Solution Overview
Problem
Single slope analog-to-digital converters (ADCs) face challenges in accuracy due to comparator delay and offset, which are difficult to compensate for using multiple reference voltages, especially in integrated circuits with limited chip area and supply voltage constraints.
Innovation Solution
The implementation of a single slope ADC that uses three reference voltages generated by resistors R1 and R2, allowing for compensation of comparator delay through specific register calculations and switch configurations, enabling accurate digital value calculation independent of resistor ratios and clock frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple accurate reference voltages are used to compensate for comparator delay and offset, then conversion accuracy is improved, but device complexity and chip area increase
Solution Approach 1:
The single accurate reference voltage is segmented into multiple virtual reference voltages through resistive division. The reference voltage generator divides Vref into Vref1, Vref2, and Vref3 using resistors R1 and R2, allowing the ADC to perform multiple comparison operations with different reference levels while relying on only one accurate reference source. This segmentation approach reduces the need for multiple independent accurate reference voltages, thereby simplifying the overall circuit complexity while maintaining conversion accuracy.
Solution Approach 2:
Resistors R1 and R2 serve as intermediary elements that transform a single accurate reference voltage into multiple usable reference levels. Instead of requiring multiple accurate reference voltage sources, the system uses these passive resistive elements to create the necessary voltage divisions, reducing the critical requirements on reference voltage accuracy and simplifying the reference generation subsystem.
2Measurement precision
If precise resistor matching is required for accurate reference voltage generation, then conversion accuracy is improved, but manufacturing precision requirements and device complexity increase
Solution Approach 1:
The system incorporates calibration registers (REG1, REG2, REG3) that store correction values determined through calibration procedures. During normal operation, these registered values are used to compensate for resistor ratio mismatches and comparator delays. This feedback mechanism allows the system to achieve high conversion accuracy without requiring extremely precise resistor matching during manufacturing, as the errors are measured and corrected through the calibration process.
Solution Approach 2:
The system changes the operating parameters by introducing digital calibration values that adjust the effective reference voltages. By modifying the digital correction factors stored in registers rather than requiring precise physical resistor values, the system achieves accurate reference voltage generation with relaxed manufacturing tolerances. The calibration process determines the actual resistor ratios and applies compensating digital corrections.
3Device complexity
If comparator delay and offset are not compensated, then device complexity is reduced, but conversion accuracy deteriorates
Solution Approach 1:
The system performs preliminary calibration actions before normal conversion operations. During calibration, the ADC measures the comparator delay and offset using the generated reference voltages and stores correction values in calibration registers. These pre-determined correction values are then applied during subsequent conversions to compensate for comparator imperfections. This preliminary calibration approach enables accurate compensation without adding complex real-time correction circuitry during normal operation.
Solution Approach 2:
The ADC performs self-calibration using its own internal reference voltage generator and comparator. The system uses itself to measure and characterize its own imperfections (comparator delay and offset) and then applies corrections based on these self-measured parameters. This self-service approach eliminates the need for external calibration equipment or complex additional compensation circuitry, achieving accurate compensation with minimal added complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies ADC circuitry by relying on a single accurate reference voltage, eliminating the need for precise resistor matching and reducing errors, while effectively compensating for comparator delay and offset, thus improving conversion accuracy and robustness across temperature variations.
Implementation Method 1
a voltage slope generator
Implementation Method 2
a reference voltage generator configured to generate a first reference voltage, a second reference voltage, and a third reference voltage, where the first reference voltage equals the sum of the second reference voltage and the third reference voltage... a voltage source generating the first voltage reference, a first resistor, and a second resistor, wherein the second voltage reference is based upon the first resistor, and the third voltage reference is based upon the second resistor
Implementation Method 3
a first comparator configured to compare a voltage to a voltage output from the voltage slope generator
Data Source
AI summary
Various embodiments relate to a single slope analog to digital converter (ADC), including: a voltage slope generator; a reference voltage generator configured to generate a first reference voltage, a second reference voltage, and a third reference voltage, where the first reference voltage equals the sum of the second reference voltage and the third reference voltage; a first comparator configured to compare a voltage to a voltage output from the voltage slope generator; a first register configured to store a first count based upon the first reference voltage being input into the first comparator; a second register configured to store a second count based upon the second reference voltage being input into the first comparator; a third register configured to store a third count based upon the third reference voltage being input into the first comparator; a fourth register configured to store a fourth count based upon a first input voltage being input into the first comparator, wherein the first input voltage is the voltage to be converted to a digital value by the ADC; and an output circuit configured to calculate a digital value for the first input voltage based upon the first, second, third, and fourth counts.