Single-Wire Bus Scan Testing Without Extra External Pins
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Solution Overview
Problem
Traditional Scan tests in single-wire bus circuits require multiple physical pins (SI, SE, CLK, and SO) which increase complexity and footprint, making them inefficient for complex logic devices in mobile communication devices.
Innovation Solution
A single-wire bus circuit design that uses internal pins to simulate the required external pins (SI, SE, CLK, and SO) through a driver circuit, allowing Scan tests without additional external pins, reducing complexity and footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional Scan test method is used with multiple physical pins (SI, SE, CLK, SO), then Scan test functionality is achieved, but device complexity and footprint increase
Solution Approach 1:
The single bus pin is designed to perform multiple functions: it serves as the primary communication interface during normal operation and simultaneously provides all Scan test inputs (SI, SE, CLK) and outputs (SO) when in test mode. This multi-functionality eliminates the need for separate dedicated pins for each Scan test signal.
Solution Approach 2:
A test driver circuit is introduced as an intermediary component that interfaces between the single bus pin and the scan test circuitry. This driver circuit generates the necessary test signals (SI, SE, CLK) and captures test results (SO) from the single bus pin, enabling Scan test functionality without requiring multiple physical pins.
2Reliability
If additional external pins are added to support Scan test, then Scan test capability is enabled, but circuit footprint increases
Solution Approach 1:
The single bus pin is designed to perform multiple functions: it serves as the primary communication interface during normal operation and simultaneously provides all Scan test inputs (SI, SE, CLK) and outputs (SO) when in test mode. This multi-functionality eliminates the need for separate dedicated pins for each Scan test signal.
3Productivity
If traditional functional testing methods are used, then expected modes of operation can be tested, but unexercised modes remain undetected
Solution Approach 1:
Scan test circuits and mechanisms are built into the device during the design phase, before the device is deployed. This preliminary integration of test infrastructure enables comprehensive testing of all modes of operation, including edge cases and error conditions, without requiring post-deployment modifications or additional testing hardware.
Data Source
AI summary
A Scan test in a single-wire bus circuit is described in the present disclosure. The single-wire bus circuit has only one external pin for connecting to a single-wire bus. Given that multiple physical pins are required to carry out the Scan test, the single-wire bus circuit must provide additional pins required by the Scan test. In embodiments disclosed herein, the single-wire bus circuit includes a communication circuit under test, and a driver circuit coupled to the communication circuit via multiple internal pins. The driver circuit uses a subset of the internal pins as input pins and another subset of the internal pins as output pins to carry out the Scan test in the communication circuit. As a result, it is possible to perform the Scan test without adding additional external pins to the single-wire bus circuit, thus helping to reduce complexity and footprint of the single-wire bus circuit.