System-in-Package Encapsulation Reducing Warpage
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Solution Overview
Problem
The existing process for forming system-in-packages (SiP) is costly and time-consuming due to repetitive steps like underfill and encapsulation, and it can cause warpage of the interposer, with the need for a package substrate adding thickness and complexity.
Innovation Solution
A single encapsulation step using a flowable material that hardens to form a molding compound around semiconductor chips and the interposer, eliminating the need for underfill and allowing direct coupling to a printed circuit board, thereby reducing processing time and cost while minimizing warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple repetitive steps (underfill, encapsulation) are used in the traditional SiP forming process, then the mechanical support and protection of semiconductor chips are improved, but the processing time and manufacturing cost increase significantly
Solution Approach 1:
The patent combines the underfill and encapsulation steps into a single integrated molding process. The flowable molding compound is applied once to simultaneously provide underfill between the chip and interposer and encapsulate the entire assembly, eliminating the need for separate underfill and encapsulation steps. This reduces processing time while maintaining the mechanical support and protection functions.
Solution Approach 2:
The flowable molding compound serves multiple functions simultaneously: it acts as underfill to provide mechanical support between the chip and interposer, serves as encapsulation material to protect the assembly, and provides thermal management. This multi-functional material replaces multiple specialized materials and process steps.
2Reliability
If multiple repetitive steps (underfill, encapsulation) are used in the traditional SiP forming process, then the mechanical support and protection of semiconductor chips are improved, but the manufacturing cost increases
Solution Approach 1:
The patent combines the underfill and encapsulation steps into a single integrated molding process. The flowable molding compound is applied once to simultaneously provide underfill between the chip and interposer and encapsulate the entire assembly, eliminating the need for separate underfill and encapsulation steps. This reduces processing time while maintaining the mechanical support and protection functions.
Solution Approach 2:
The flowable molding compound serves multiple functions simultaneously: it acts as underfill to provide mechanical support between the chip and interposer, serves as encapsulation material to protect the assembly, and provides thermal management. This multi-functional material replaces multiple specialized materials and process steps.
3Strength
If carrier substrate and package substrate are used in the traditional SiP process, then the structural support and electrical connection are improved, but the package thickness and complexity increase
Solution Approach 1:
The patent eliminates the carrier substrate from the traditional SiP structure. The interposer is directly mounted to the package substrate without requiring a carrier substrate for support during processing. This extraction of the carrier substrate layer directly reduces package thickness and simplifies the overall structure while maintaining structural integrity through the integrated molding compound.
Solution Approach 2:
The patent changes the mechanical properties of the molding compound by using a flowable material that can be applied in a single step. This allows the molding compound to flow into and around all components before curing, providing structural support without requiring additional substrate layers, thereby reducing overall package thickness.
4Adaptability or versatility
If mounting and demounting carrier substrate are performed, then the processing flexibility is improved, but the interposer warpage is caused
Solution Approach 1:
The patent performs the molding operation before mounting the interposer to the package substrate. The flowable molding compound is applied to the carrier substrate first, then the interposer-chip assembly is mounted into the still-flowable material. This preliminary molding action provides support to the interposer during mounting, preventing warpage that would otherwise occur during carrier substrate demounting.
Solution Approach 2:
The flowable molding compound acts as a cushioning material before the interposer is fully mounted and cured. This beforehand cushioning provides mechanical support and stress distribution during the critical mounting phase, preventing warpage from developing. Once cured, this cushioning structure maintains interposer stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a faster, cheaper, and thinner SiP with reduced warpage, achieving a thickness of about 100 microns, more than half that of traditional SiPs, without the need for a package substrate.
Implementation Method 1
prior to setting or curing, the encapsulation layer is able to flow between the semiconductor chips and the interposer to provide further mechanical support for the semiconductor chips
Implementation Method 2
a single processing step may be used to encapsulate the semiconductor chips and the interposer in the encapsulation layer. Furthermore, prior to setting or curing, the encapsulation layer is able to flow
Data Source
AI summary
One or more embodiments are directed to a system-in-package (SiP) that includes a plurality of semiconductor chips and an interposer that that are molded in an encapsulation layer together. That is, a single processing step may be used to encapsulate the semiconductor chips and the interposer in the encapsulation layer. Furthermore, prior to setting or curing, the encapsulation layer is able to flow between the semiconductor chips and the interposer to provide further mechanical support for the semiconductor chips. Thus, the process for forming the SiP is reduced, resulting in a faster processing time and a lower cost. Additionally, one or more embodiments described herein reduce or eliminate warpage of the interposer.


