Six-Transistor Shift Register for LCD Noise Reduction
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Solution Overview
Problem
Conventional shift registers in LCDs are complex, leading to noise interference in gate and data drivers due to their intricate circuit structure and the use of multiple transistors, which complicates the driving of thin film transistors and affects image display.
Innovation Solution
A simplified shift register design utilizing fewer transistors, with each shift register unit comprising a first switch circuit for providing a high level signal, a second switch circuit for a low level signal, a third switch circuit for a clock signal, and an inverter between the output and reverse output terminals, connected in a series configuration to reduce noise interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional shift register units with multiple transistors and complex clock reversed phase circuits are used, then the shift register can provide complete clock signal control, but the circuit structure becomes complex and generates noise interference
Solution Approach 1:
The patent extracts and removes the complex clock reversed phase circuits from the shift register unit, retaining only the essential switching transistors. This extraction eliminates the source of noise interference while preserving the core functionality of signal transmission and clock control.
Solution Approach 2:
The patent converts the harmful effect of complex circuit structures that generate noise into a benefit by deliberately simplifying the circuit design. The simplified structure with fewer transistors inherently produces less noise, transforming the complexity issue into a noise reduction advantage.
2Ease of manufacture
If conventional shift register units with ten transistors are used, then the circuit can provide complete switching control, but the manufacturing process becomes more difficult and costly
Solution Approach 1:
The patent merges the functions of multiple transistors into a simplified configuration where fewer transistors perform combined switching and clock control functions. This reduction from ten transistors to a fewer number simplifies the manufacturing process while maintaining operational completeness.
Solution Approach 2:
The remaining transistors in the simplified design perform multiple functions simultaneously - serving as both switching elements and clock signal distributors. This multi-functionality reduces the total transistor count needed while maintaining the shift register's operational capabilities.
3Area of stationary object
If conventional shift register units with complex clock reversed phase circuits are used, then the circuit can provide precise clock control, but the area occupied by the circuit increases
Solution Approach 1:
The patent extracts and removes the bulky clock reversed phase circuits that occupy significant area, retaining only the minimal necessary components for clock signal distribution. This extraction dramatically reduces the circuit area while preserving essential clock control functionality.
Data Source
AI summary
An exemplary shift register (20) includes a plurality of shift register units (200) connected one by one. Each of the shift register units includes a clock signal input terminal (TS), a reverse clock signal input terminal (TSB), a high level signal input terminal (VH), a low level signal input terminal (VL), an output terminal (VOUT), a reverse output terminal (VOUTB), a first input terminal (VIN1), a second input terminal (VIN2), a common node (P), a first switch circuit (31) providing a high level signal to the common node, a second switch circuit (32) providing a low level signal to the common node, a third switch circuit (33) providing a clock signal to the output terminal, a fourth switch circuit (34) providing a low level signal to the output terminal, and an inverter (36) connected between the output terminal and the reverse output terminal.