SLC Copyback Programming for Faster MLC Writes in NAND Memory
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Solution Overview
Problem
Existing technologies struggle to efficiently convert Hg0 from flue gas and oxidized mercury (Hg2+) from waste liquid, with existing technologies, the patent addresses the inefficiencies and performance degradation in multi-pass programming of multi-layer cells (MLCs) by introducing single-layer cell (SLC) copyback operations, which contact with the technical problem of multi-pass programming of multi-layer cells (MLCs) in memory devices, specifically in SSDs, by optimizing SLC copyback operations to improve efficiency and speed.
Innovation Solution
The patent introduces multi-phase program commands for SLC copyback operations that reduce the number of commands needed for internal and external SLC copyback schemes, integrating SLC reliability checks and error correction within a single atomic command, thereby improving NAND utilization and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multi-pass programming is used to program MLCs, then data reliability is improved, but programming speed and efficiency deteriorate
Solution Approach 1:
The patent segments the MLC programming process into multiple passes (e.g., first pass for rough programming, second pass for fine programming) with different reliability requirements. Each pass can be independently optimized, allowing the system to maintain high reliability while improving overall programming speed by not requiring all passes to complete at full speed.
Solution Approach 2:
The patent performs preliminary actions by pre-programming MLCs to a less reliable state (first pass with wider threshold voltage distribution) before finalizing the programming (second pass). This preliminary programming allows data to be stored in a functional state sooner, improving effective programming speed while maintaining final reliability through the subsequent refinement pass.
2Reliability
If multiple commands are used for SLC copyback operations, then operational completeness is improved, but command overhead and processing time increase
Solution Approach 1:
The patent merges multiple separate commands (program command, read command, verify command, error correction command) into a single multi-phase program command for SLC copyback operations. This unified command structure reduces command overhead and processing time while maintaining all necessary operational steps through integrated phases that execute sequentially within the single command framework.
Solution Approach 2:
The multi-phase program command serves multiple functions simultaneously: it programs SLCs, reads back the programmed data, verifies programming success, and performs error correction if needed. This universal command structure eliminates the need for separate specialized commands for each operation, reducing overall processing time while maintaining operational completeness.
3Manufacturing precision
If traditional multi-pass MLC programming is used, then programming thoroughness is improved, but NAND utilization efficiency deteriorates
Solution Approach 1:
The patent implements dynamic programming thoroughness by adjusting the number and detail level of programming passes based on actual device state and requirements. The system can dynamically decide when sufficient programming thoroughness has been achieved and proceed to next operations, rather than rigidly executing a fixed number of passes. This dynamic approach maintains programming quality while improving NAND utilization efficiency.
Solution Approach 2:
The patent changes programming parameters (such as threshold voltage distribution width, programming pulse characteristics) between passes to optimize both thoroughness and efficiency. The first pass uses parameters optimized for speed and coverage, while subsequent passes use parameters optimized for precision and reliability. This parameter optimization allows thorough programming to be achieved more efficiently, improving NAND utilization.
4Measurement precision
If separate error detection and correction steps are implemented, then data accuracy is improved, but processing complexity and time increase
Solution Approach 1:
The patent merges error detection and correction operations into the unified multi-phase program command structure. Error detection (read verify) and error correction (program retry with correction) are integrated as phases within the same command framework, reducing the need for separate error handling command sequences and simplifying the overall processing logic while maintaining data accuracy.
Data Source
AI summary
In accordance with some embodiments of the present disclosure, a method is performed by processing circuitry of a storage device for writing data to memory of a storage device. The method is related to executing a program to write data written in a plurality of single-layer cells (SLCs) in a first portion of the memory to a plurality of multi-level cells (MLCs) in a second portion of the memory using a single program command. The single program command includes an address of each SLC in the first portion of the memory and optionally, additional information regarding SLC read-level shifts. Executing the single program command includes reading from each SLC of the plurality of SLCs, storing at least some of the respective SLC data in the plurality of latches, and writing the SLC data that was stored in the plurality of latches to the plurality of MLCs.