Sloping Gate Oxide Structure for Leakage-Controlled Multi-Voltage Transistors

The patent applies local quality by forming a gate oxide layer with a sloping sidewall structure at specific locations. The sloping sidewall is created by selectively removing oxide material from the gate oxide layer, resulting in a gradient thickness profile that is localized to the gate region. This local structural modification enables different transistor types to coexist on the same wafer without requiring completely separate processing lines, thus reducing overall manufacturing complexity while maintaining the ability to integrate both low-voltage and high-voltage transistors.

The patent employs the curvature principle by introducing a sloping sidewall structure to the gate oxide layer instead of using vertical or flat sidewalls. This curved/angled profile is achieved through selective etching that removes oxide material at the gate edges, creating a gradual transition in oxide thickness. The sloping sidewall reduces electric field concentration at sharp corners, thereby minimizing leakage current while still using standard gate oxide formation processes, thus maintaining ease of manufacture while improving reliability.

The patent applies preliminary action by pre-forming the sloping sidewall structure on the gate oxide layer before performing the source/drain doping process. This pre-established geometric feature serves as a template that automatically guides the doping profile formation. When dopants are introduced, they naturally conform to the sloping sidewall geometry, creating an optimized doped region shape that reduces leakage current. This approach maintains doping process efficiency while achieving improved electrical control, as the complex geometry is created beforehand rather than requiring complex real-time doping control.