Dynamic SMP ASMP Processor Mode Switching Controller
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Solution Overview
Problem
Existing multi-processor systems either operate in symmetric multi-processing (SMP) or asymmetric multi-processing (ASMP) modes, lacking the ability to dynamically switch between both modes efficiently, which leads to higher power consumption and increased complexity due to the need for duplicate hardware configurations.
Innovation Solution
A multi-processing system that includes a controller to switch between SMP and ASMP modes by adjusting clock frequencies and supply voltages for processors, allowing operation in either mode without requiring duplicate multi-processor cores, caches, and clock domain crossing subsystems, thereby reducing power consumption and implementation costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If SMP mode is used with all processors operating at the same clock frequency and voltage, then system simplicity and ease of operation are improved, but power consumption increases due to inability to scale frequencies individually
Solution Approach 1:
The system dynamically switches between SMP and ASMP modes based on workload requirements. In ASMP mode, individual processors can operate at different clock frequencies and voltages, allowing power-efficient scaling for unbalanced workloads while maintaining the ability to operate in SMP mode for simplicity when needed
2Use of energy by moving object
If ASMP mode is used with individually scalable clock frequencies and voltages, then power efficiency is improved, but device complexity increases due to additional hardware requirements
Solution Approach 1:
The patent implements a unified multi-processor subsystem that can operate in both SMP and ASMP modes using the same physical hardware. The system includes circuitry that enables dynamic reconfiguration between the two modes, eliminating the need for separate duplicate hardware configurations for each mode while providing the benefits of both approaches
3Adaptability or versatility
If duplicate hardware configurations are provided for both SMP and ASMP modes, then adaptability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the SMP and ASMP operational modes into a single integrated multi-processor subsystem. The same physical processors, caches, and interconnect structures are used for both modes, with control logic that dynamically reconfigures the system behavior rather than requiring separate hardware instances. This consolidation reduces manufacturing costs and simplifies the overall device architecture
Data Source
AI summary
A processing system includes multiple processors in which first processor operates at a first clock frequency and first supply voltage at all times. At least one processor is dynamically switchable to operate at the first clock frequency and first supply voltage resulting in the first and second processors providing symmetrical multi-processing (SMP) or at a second clock frequency and a second supply voltage resulting in the first and second processors providing asymmetrical multi-processing (ASMP). A third processor may be included that also operates at the first clock frequency and the first supply voltage at all times. Various criteria can be used to determine when to switch the at least one switchable processor to improve power consumption and/or performance. A controller enables control and fast-switching between the two modes for the switchable processor. Upon receipt of a switching command to switch between SMP and ASMP, a series or sequence of actions are performed to control a voltage supply and CPU/memory clock to the switchable processor and cache memory.