Sn-Bi Core Material With Sn Layer for Stable Solder Bump Reflow
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Solution Overview
Problem
The existing solder bump technologies face issues with Bi concentration gradients leading to increased yellowness, oxide film thickness, and defects during visual inspection and reflow, causing short-circuits and misalignment in three-dimensional high-density semiconductor packaging.
Innovation Solution
A core material with a Sn-58Bi, Sn-40Bi, or Sn-3Bi-based solder alloy having a uniform Bi concentration distribution, where a Sn layer is applied on the outer side of the solder layer, with specific thickness and composition to prevent Bi concentration gradients and oxide film thickness increase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If Bi concentration gradient is used in solder plating layer (high Bi on inner side, low Bi on outer side), then melting starts from inner side which should control reflow process, but volume expansion creates pressure difference that causes Cu core ball to burst open
Solution Approach 1:
The patent applies homogeneity by making the Bi concentration uniform throughout the solder plating layer, eliminating the concentration gradient. This prevents differential volume expansion between inner and outer regions during melting, avoiding pressure differences that would cause the Cu core ball to burst open, while still enabling controlled reflow process
2Manufacturing precision
If Bi content is increased in solder plating layer to improve soldering performance, then melting temperature is reduced and wetting is improved, but yellowness increases causing visual inspection defects
Solution Approach 1:
The patent applies parameter changes by precisely controlling the Bi content within a specific range (3.0-7.0 wt%) and adjusting the Sn/Bi ratio. This optimization balances the competing requirements: maintaining sufficient Bi content for improved melting characteristics and wetting performance, while limiting it to prevent excessive yellowness that would cause visual inspection defects
3Reliability
If oxide film thickness is increased to protect core material, then corrosion resistance is improved, but melting behavior deteriorates causing ball missing or misalignment
Solution Approach 1:
The patent applies local quality by creating a multi-layer structure with different compositions and functions: an inner solder plating layer (Sn-Bi alloy) that provides corrosion resistance and controlled melting, and an outer Sn layer that is thinner and has different properties. This layered approach allows each layer to perform its specific function optimally without interfering with the overall bonding accuracy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution prevents defects during visual inspection and reflow, ensuring reliable solder bump formation without short-circuits or misalignment, maintaining the integrity of the semiconductor package.
Implementation Method 1
a Sn layer provided on an outer side of the solder layer... to prevent Bi concentration gradients and oxide film thickness increase
Implementation Method 2
the solder begins to be melted from a Bi region on the inner circumferential side... a volume expansion in the Bi region on the inner circumferential side occurs early
Data Source
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AI summary
A core material has a core 12; a solder layer 16 made of a (Sn-Bi)-based solder alloy provided on an outer side of the core 12; and a Sn layer 20 provided on an outer side of the solder layer 16. The core contains metal or a resin. When a concentration ratio of Bi contained in the solder layer 16 is a concentration ratio (%) = a measured value of Bi (% by mass)/a target Bi content (% by mass), or a concentration ratio (%) = an average value of measured values of Bi (% by mass)/a target Bi content (% by mass), the concentration ratio is 91.4% to 106.7%. The thickness of the Sn layer 20 is 0.215% or more and 36% or less of the thickness of the solder layer 16.