SoC Power Management via Checksum-Based Self-Refresh Sleep
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Solution Overview
Problem
Current sleep mode designs for data storage devices, such as solid-state hybrid drives (SSHDs), face challenges in reducing power consumption and resume time due to always-on wake up power island (WUPI) blocks, which consume significant power and prolong resume times compared to SSDs.
Innovation Solution
A system on chip (SoC) is configured to receive sleep commands, calculate and store checksums, copy data into volatile storage, operate in self-refresh mode, and shut down non-essential components, allowing for complete power-off of the WUPI block during sleep mode, and initiate a warm boot upon wake-up commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the wake up power island (WUPI) block is kept always-on to enable sleep mode functionality, then the device can respond to wake-up commands, but power consumption increases and resume time is prolonged
Solution Approach 1:
The patent extracts the wake-up functionality from the main system by implementing a dedicated wake-up detector that operates independently. This detector monitors for wake-up events while the rest of the system remains in a powered-off state, allowing the main processor and components to be completely shut down while maintaining wake-up responsiveness.
Solution Approach 2:
The system is segmented into distinct functional blocks with different power states: a minimal wake-up detector that remains active at very low power, and the main system components that are completely powered down. This segmentation allows selective powering of only the necessary subset of components during sleep mode.
2Reliability
If the wake up power island (WUPI) block is kept always-on to enable sleep mode functionality, then the device can respond to wake-up commands, but resume time increases compared to SSDs
Solution Approach 1:
The patent implements preliminary actions during the sleep transition by pre-positioning the wake-up detector in a standby state and pre-configuring the system to enter a complete power-off state. When a wake-up event occurs, the system is already prepared to rapidly power up essential components, minimizing resume time.
3Use of energy by moving object
If all components are shut down during sleep mode to minimize power consumption, then power consumption is reduced, but the system cannot verify data integrity or respond to wake-up commands
Solution Approach 1:
The patent introduces an intermediary checksum verification mechanism that operates during the power transition phases. Checksum values are calculated and stored before power-down, and verified after power-up without requiring the main system to remain powered, thus enabling data integrity verification while maintaining complete power-off during sleep.
Data Source
AI summary
An implementation of a system disclosed herein provides an apparatus, comprising a system on chip, wherein the system on chip is configured to receive a sleep command from a host and in response to the sleep command, calculate a primary checksum of a block of data from a low latency memory such as a tightly coupled memory (TCM), copy the primary checksum and the block of data into a volatile storage media, preserve interface variables of the system on chip in the volatile storage media, operate the volatile storage media in a self-refresh mode, and shut down power to other components on the system on chip.